Datasheet

 2005-2015 Microchip Technology Inc. DS40001262F-page 251
PIC16F631/677/685/687/689/690
FIGURE 17-19: A/D CONVERSION TIMING (SLEEP MODE)
TABLE 1: A/D CONVERSION REQUIREMENTS (SLEEP MODE)
Standard Operating Conditions (unless otherwise stated)
Operating Temperature -40°C T
A +125°C
Param
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
130* T
AD A/D Internal RC
Oscillator Period 3.0* 6.0 9.0* s
ADCS<1:0> = 11 (RC mode)
At V
DD = 2.5V
2.0* 4.0 6.0* sAt V
DD = 5.0V
131 TCNV Conversion Time
(not including
Acquisition Time)
(1)
—11—TAD
132* TACQ Acquisition Time
(2)
5*
11.5
—
—
—
s
s The minimum time is the amplifier
settling time. This may be used if
the “new” input voltage has not
changed by more than 1 LSb (i.e.,
4.1 mV @ 4.096V) from the last
sampled voltage (as stored on
C
HOLD).
134 T
GO Q4 to A/D Clock
Start
—TOSC/2 + TCY — — If the A/D clock source is selected
as RC, a time of T
CY is added
before the A/D clock starts. This
allows the SLEEP instruction to be
executed.
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0V, 25C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: ADRES register may be read on the following T
CY cycle.
2: See Table 9 -1 for minimum conditions.
131
130
BSF ADCON0, GO
Q4
A/D CLK
A/D Data
ADRES
ADIF
GO
Sample
OLD_DATA
Sampling Stopped
DONE
NEW_DATA
9 7 3210
Note 1: If the A/D clock source is selected as RC, a time of T
CY is added before the A/D clock starts. This allows the
SLEEP instruction to be executed.
134
6
8
132
1 TCY
(TOSC/2 + TCY)
(1)
1 TCY