Datasheet

PIC16F631/677/685/687/689/690
DS40001262F-page 122  2005-2015 Microchip Technology Inc.
FIGURE 10-1: FLASH PROGRAM MEMORY READ CYCLE EXECUTION
Table 0-1:
Q
1
Q
2
Q
3
Q
4
Q
1
Q
2
Q
3
Q
4
Q
1
Q
2
Q
3
Q
4
Q
1
Q
2
Q
3
Q
4
Q
1
Q
2
Q
3
Q
4
Q
1
Q
2
Q
3
Q
4
BSF EECON1,RD
executed here
INSTR(PC + 1)
executed here
Forced NOP
executed here
PC
PC + 1 EEADRH,EEADR
PC+3
PC + 5
Flash ADDR
RD bit
EEDATH,EEDAT
PC + 3 PC + 4
INSTR (PC + 1)
INSTR(PC - 1)
executed here
INSTR(PC + 3)
executed here
INSTR(PC + 4)
executed here
Flash Data
EEDATH
EEDAT
Register
EERHLT
INSTR (PC) INSTR (PC + 3) INSTR (PC + 4)