Datasheet

 2011-2017 Microchip Technology Inc. DS40001574D-page 217
PIC16(L)F1938/9
TABLE 23-10: SUMMARY OF REGISTERS ASSOCIATED WITH ENHANCED PWM
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
CCPxCON PxM<1:0>
(1)
DCxB<1:0> CCPxM<3:0>
218
CCPxAS CCPxASE CCPxAS2 CCPxAS1 CCPxAS0 PSSxAC<1:0> PSSxBD<1:0>
221
CCPTMRS0 C4TSEL<1:0> C3TSEL<1:0> C2TSEL<1:0> C1TSEL<1:0>
219
CCPTMRS1
— — — — — — C5TSEL<1:0>
220
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF
87
PIE1
TMR1GIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE
88
PIE2
OSFIE C2IE C1IE EEIE BCLIE LCDIE — CCP2IE
89
PIE3
— CCP5IE CCP4IE CCP3IE TMR6IE — TMR4IE —
90
PIR1
TMR1GIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF
91
PIR2
OSFIF C2IF C1IF EEIF BCLIF LCDIF —CCP2IF
92
PIR3
— CCP5IF CCP4IF CCP3IF TMR6IF — TMR4IF —
93
PRx
Timer2/4/6 Period Register 191*
PSTRxCON
— — — STRxSYNC STRxD STRxC STRxB STRxA
223
PWMxCON PxRSEN PxDC<6:0>
222
TxCON
— TxOUTPS<3:0> TMRxON TxCKPS<:0>1
193
TMRx Timer2/4/6 Module Register
191
TRISA
TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
120
TRISB
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0
125
TRISC TRISC7 TRISC6
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
129
TRISD
(2)
TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0
132
TRISE
— — — — —
(3)
TRISE2
(2)
TRISE1
(2)
TRISE0
(2)
135
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM.
Note 1: Applies to ECCP modules only.
2: These registers/bits are not implemented on PIC16(L)F1938 devices, read as ‘0’.
3: Unimplemented, read as ‘1’.
* Page provides register information.