Datasheet

 2009 Microchip Technology Inc. Preliminary DS41364D-page 503
PIC16F193X/LF193X
First Start Bit Timing ................................................. 268
Full-Bridge PWM Output ........................................... 221
Half-Bridge PWM Output .................................. 219, 225
I
2
C Bus Data ............................................. 406, 438, 470
I
2
C Bus Start/Stop Bits.............................. 405, 437, 469
I
2
C Master Mode (7 or 10-Bit Transmission) ............ 271
I
2
C Master Mode (7-Bit Reception)........................... 273
I
2
C Stop Condition Receive or Transmit Mode ......... 274
INT Pin Interrupt.......................................................... 95
Internal Oscillator Switch Timing................................. 74
LCD Interrupt Timing in Quarter-Duty Cycle Drive.... 354
LCD Sleep Entry/Exit when SLPEN = 1 or CS = 00 . 356
PWM Auto-shutdown ................................................ 224
Firmware Restart .............................................. 224
PWM Direction Change ............................................ 222
PWM Direction Change at Near 100% Duty Cycle ... 223
PWM Output (Active-High)........................................ 217
PWM Output (Active-Low) ........................................ 218
Repeat Start Condition.............................................. 269
Reset Start-up Sequence............................................ 87
Reset, WDT, OST and Power-up Timer ... 395, 427, 459
Send Break Character Sequence ............................. 307
SPI Master Mode (CKE = 1, SMP = 1) ..... 403, 435, 467
SPI Mode (Master Mode).......................................... 241
SPI Slave Mode (CKE = 0) ....................... 404, 436, 468
SPI Slave Mode (CKE = 1) ....................... 404, 436, 468
Synchronous Reception (Master Mode, SREN) ....... 311
Synchronous Transmission....................................... 309
Synchronous Transmission (Through TXEN) ........... 309
Timer0 and Timer1 External Clock ........... 397, 429, 461
Timer1 Incrementing Edge........................................ 195
Two Speed Start-up .................................................... 77
Type-A in 1/2 Mux, 1/2 Bias Drive ............................ 343
Type-A in 1/2 Mux, 1/3 Bias Drive ............................ 345
Type-A in 1/3 Mux, 1/2 Bias Drive ............................ 347
Type-A in 1/3 Mux, 1/3 Bias Drive ............................ 349
Type-A in 1/4 Mux, 1/3 Bias Drive ............................ 351
Type-A/Type-B in Static Drive................................... 342
Type-B in 1/2 Mux, 1/2 Bias Drive ............................ 344
Type-B in 1/2 Mux, 1/3 Bias Drive ............................ 346
Type-B in 1/3 Mux, 1/2 Bias Drive ............................ 348
Type-B in 1/3 Mux, 1/3 Bias Drive ............................ 350
Type-B in 1/4 Mux, 1/3 Bias Drive ............................ 352
USART Synchronous Receive (Master/Slave)
.......................................................... 402, 434, 466
USART Synchronous Transmission (Master/Slave
)......................................................... 401, 433, 465
Wake-up from Interrupt............................................. 108
Timing Diagrams and Specifications
PLL Clock.................................................. 393, 425, 457
Timing Parameter Symbology........................... 391, 423, 455
Timing Requirements
I
2
C Bus Data ............................................. 407, 439, 471
I2C Bus Start/Stop Bits ............................. 406, 438, 470
SPI Mode .................................................. 405, 437, 469
TMR0 Register.................................................................... 39
TMR1H Register ................................................................. 39
TMR1L Register.................................................................. 39
TMR2 Register.............................................................. 39, 47
TRIS.................................................................................. 376
TRISA Register ........................................................... 40, 130
TRISB ............................................................................... 133
TRISB Register ........................................................... 40, 135
TRISC ............................................................................... 137
TRISC Register........................................................... 40, 138
TRISD ............................................................................... 140
TRISD Register........................................................... 40, 141
TRISE ............................................................................... 143
TRISE Register........................................................... 40, 144
Two-Speed Clock Start-up Mode........................................ 76
TXCON (Timer2/4/6) Register .......................................... 205
TXREG ............................................................................. 289
TXREG Register................................................................. 42
TXSTA Register.......................................................... 42, 296
BRGH Bit.................................................................. 299
U
USART
Synchronous Master Mode
Requirements, Synchronous Receive402, 434, 466
Requirements, Synchronous Transmission
................................................. 402, 434, 466
Timing Diagram, Synchronous Receive
................................................. 402, 434, 466
Timing Diagram, Synchronous Transmission
................................................. 401, 433, 465
V
VREF. SEE ADC Reference Voltage
W
Wake-up on Break............................................................ 305
Wake-up Using Interrupts................................................. 108
Watchdog Timer (WDT)...................................................... 86
Modes....................................................................... 110
Specifications ........................................... 397, 429, 461
WCOL....................................................... 267, 270, 272, 274
WCOL Status Flag.................................... 267, 270, 272, 274
WDTCON Register ........................................................... 111
WPUB Register................................................................. 136
Write Protection .................................................................. 65
WWW Address ................................................................. 503
WWW, On-Line Support ..................................................... 11