Datasheet

2010-2011 Microchip Technology Inc. Preliminary DS41440B-page 317
PIC16(L)F1825/1829
FIGURE 26-10: SYNCHRONOUS TRANSMISSION
FIGURE 26-11: SYNCHRONOUS TRANSMISSION (THROUGH TXEN)
TABLE 26-7: SUMMARY OF REGISTERS ASSOCIATED WITH SYNCHRONOUS MASTER
TRANSMISSION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register on
Page
APFCON0 RXDTSEL
SDOSEL
(1)
SSSEL
(1)
T1GSEL TXCKSEL
123
BAUDCON
ABDOVF RCIDL SCKP BRG16 WUE ABDEN
306
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF
92
PIE1
TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 93
PIR1
TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF
97
RCSTA SPEN
RX9 SREN CREN ADDEN FERR OERR RX9D
305
SPBRGL
BRG<7:0> 307*
SPBRGH
BRG<15:8>
307*
TRISC TRISC7 TRISC6
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
138
TXREG
EUSART Transmit Data Register
297*
TXSTA CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D
304
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for Synchronous Master Transmission.
* Page provides register information.
Note 1: PIC16(L)F1825 only.
bit 0 bit 1 bit 7
Word 1
bit 2 bit 0 bit 1 bit 7
RX/DT
Write to
TXREG Reg
TXIF bit
(Interrupt Flag)
TXEN bit
1 1
Word 2
TRMT bit
Write Word 1
Write Word 2
Note: Sync Master mode, SPBRGL = 0, continuous transmission of two 8-bit words.
pin
TX/CK pin
TX/CK pin
(SCKP = 0)
(SCKP = 1)
RX/DT pin
TX/CK pin
Write to
TXREG reg
TXIF bit
TRMT bit
bit 0
bit 1
bit 2
bit 6 bit 7
TXEN bit