Datasheet

 2010-2011 Microchip Technology Inc. Preliminary DS41440B-page 235
PIC16(L)F1825/1829
TABLE 24-10: SUMMARY OF REGISTERS ASSOCIATED WITH ENHANCED PWM
NameBit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Register on
Page
APFCON1
— — SDO2SEL
(2)
SS2SEL
(2)
P1DSEL P1CSEL P2BSEL CCP2SEL 124
CCP1CON P1M<1:0>
(1)
DC1B<1:0> CCP1M<3:0> 236
CCP2CON P2M<1:0>
(1)
DC2B<1:0> CCP2M<3:0> 236
CCP3CON
—
—
DC3B<1:0> CCP3M<3:0> 236
CCP4CON
—
—
DC4B<1:0> CCP4M<3:0> 236
CCP1AS CCP1ASE CCP1AS<2:0> PSS1AC<1:0> PSS1BD<1:0> 238
CCP2AS CCP2ASE CCP2AS<2:0> PSS2AC<1:0> PSS2BD<1:0> 238
CCPTMRS C4TSEL<1:0> C3TSEL<1:0> C2TSEL<1:0> C1TSEL<1:0> 237
INLVLA
— — INLVLA5 INLVLA4 INLVLA3 INLVLA2 INLVLA1 INLVLA0 129
INLVLC INLVLC7
(1)
INLVLC6
(1)
INLVLC5 INLVLC4 INLVLC3 INLVLC2 INLVLC1 INLVLC0 140
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF 92
PIE1
TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 93
PIE2
OSFIE C2IE C1IE EEIE BCL1IE — — CCP2IE 94
PIE3
— — CCP4IE CCP3IE TMR6IE — TMR4IE — 95
PIR1
TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF 97
PIR2
OSFIF C2IF C1IF EEIF BCL1IF — — CCP2IF 98
PIR3
— — CCP4IF CCP3IF TMR6IF — TMR4IF — 99
PRx Timer2/4/6 Period Register 199*
PSTR1CON
— — — STR1SYNC STR1D STR1C STR1B STR1A
240
PSTR2CON — — — STR2SYNC STR2D STR2C STR2B STR2A
240
PWM1CON P1RSEN P1DC<6:0>
239
PWM2CON P2RSEN P2DC<6:0>
239
T2CON
— T2OUTPS<3:0> TMR2ON T2CKPS<1:0> 201
T4CON
— T4OUTPS<3:0> TMR4ON T4CKPS<1:0> 201
T6CON
— T6OUTPS<3:0> TMR6ON T6CKPS<1:0> 201
TMRx Timer2/4/6 Module Register 199*
TRISA
— —
TRISA5 TRISA4
TRISA3 TRISA2 TRISA1 TRISA0
127
TRISC TRISC7
(2)
TRISC6
(2)
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
138
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM.
Note 1: Applies to ECCP modules only.
2: PIC16(L)F1829 only.
* Page provides register information.