Datasheet

 2010-2015 Microchip Technology Inc. DS40001419F-page 373
PIC16(L)F1824/8
TABLE 30-22: MEMORY PROGRAMMING REQUIREMENTS FOR PIC16F1824/8-H (High Temp.)
TABLE 30-23: OSCILLATOR PARAMETERS FOR PIC16F1824/8-H
(High Temp.)
TABLE 30-24: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET PARAMETERS FOR PIC16F1824/8-H
(High Temp.)
PIC16F1824/8
Standard Operating Conditions: (unless otherwise stated)
Operating Temperature: -40°C  T
A  +150°C for High Temperature
Param
No.
Sym. Characteristic Min. Typ. Max. Units Conditions
Data EEPROM Memory
D116 E
D Byte Endurance 50K — — E/W -40°C to +150°C
D118 T
DEW Erase/Write Cycle Time — — 6.0 ms -40°C to +150°C
D119 TRETD Data Retention — 20 — Years  50K Programming cycles
Program Flash Memory
D121 E
P Cell Endurance — — — — Programming the Flash memory
above +125°C is not permitted
D124 T
RETD Data Retention — 20 — Years
PIC16F1824/8
Standard Operating Conditions: (unless otherwise stated)
Operating Temperature: -40°C  TA  +150°C for High Temperature
Param
No.
Sym. Characteristic
Frequency
Tolerance
Min. Typ. Max. Units Conditions
OS08 HF
OSC Int. Calibrated HFINTOSC
Freq.
(1)
±5% — 16.0 — MHz -40°C TA 125°C
V
DD 2.5V
±10% — 16.0 — MHz -40°C TA 150°C
V
DD 2.5V
OS08A MFOSC Int. Calibrated MFINTOSC
Freq.
(1)
±5% — 500 — kHz -40°C TA 125°C
V
DD 2.5V
±10% — 500 — kHz -40°C T
A 150°C
V
DD 2.5V
OS09 LFOSC Internal LFINTOSC Freq. ±35% — 31 — kHz -40°C TA 150°C
V
DD 2.5V
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: To ensure these oscillator frequency tolerances, V
DD and VSS must be capacitively decoupled as close to
the device as possible. 0.1 µF and 0.01 µF values in parallel are recommended.
PIC16F1824/8
Standard Operating Conditions: (unless otherwise stated)
Operating Temperature: -40°C  TA  +150°C for High Temperature
Param
No.
Sym. Characteristic Min. Typ. Max. Units Conditions
31 T
WDTLP Low-Power Watchdog Timer
Time-out Period (No Prescaler)
10 16 24 ms VDD = 3.3V-5V
1:16 Prescaler used
35 V
BOR Brown-out Reset Voltage
(1)
2.50
—
2.70
—
2.90
—
V
—
BORV = 0
BORV = 1
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1: To ensure these voltage tolerances, VDD and VSS must be capacitively decoupled as close to the device as
possible. 0.1 µF and 0.01 µF values in parallel are recommended.