Datasheet

 2011 Microchip Technology Inc. Preliminary DS41441B-page 275
PIC12(L)F1840
TABLE 26-2: SUMMARY OF REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
BAUDCON
ABDOVF RCIDL — SCKP BRG16 —WUEABDEN 278
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF 83
PIE1
TMR1GIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 84
PIR1
TMR1GIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF
86
RCREG EUSART Receive Data Register 272*
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 277
SPBRGL BRG<7:0> 279*
SPBRGH BRG<15:8> 279*
TXSTA
CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 276
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for Asynchronous Reception.
* Page provides register information.