Datasheet

 2011 Microchip Technology Inc. Preliminary DS41441B-page 149
PIC12(L)F1840
TABLE 18-2: SUMMARY OF REGISTERS ASSOCIATED WITH SR LATCH MODULE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
SRCON0 SRLEN SRCLK2 SRCLK1 SRCLK0 SRQEN SRNQEN SRPS SRPR 147
SRCON1 SRSPE SRSCKE
Reserved SRSC1E SRRPE SRRCKE Reserved SRRC1E 148
TRISA
— —TRISA5TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
115
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the SR Latch module.