Datasheet

PIC12(L)F1840
DS41441B-page 92 Preliminary  2011 Microchip Technology Inc.
TABLE 9-1: SUMMARY OF REGISTERS ASSOCIATED WITH POWER-DOWN MODE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 83
IOCAF
— — IOCAF5 IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0 120
IOCAN
— — IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0 120
IOCAP
— — IOCAP5 IOCAP4 IOCAP3 IOCAP2 IOCAP1 IOCAP0 120
PIE1 TMR1GIE ADIE RCIE
TXIE SSP1IE CCP1IE TMR2IE TMR1IE 84
PIE2
OSFIE —C1IEEEIEBCL1IE — — — 85
PIR1 TMR1GIF ADIF RCIF
TXIF SSP1IF CCP1IF TMR2IF TMR1IF 86
PIR2
OSFIF —C1IFEEIFBCL1IF — — — 87
STATUS
— — —TOPD Z DC C 18
VREGCON
(1)
— — — — — —VREGPMReserved 91
WDTCON
— — WDTPS4 WDTPS3 WDTPS2 WDTPS1 WDTPS0 SWDTEN 95
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used in Power-down mode.
Note 1: PIC12F1840 only.