Datasheet
2011 Microchip Technology Inc. Preliminary DS041441B-page 377
PIC12(L)F1840
MDCARH (Modulation High Carrier Control
Register) ........................................................... 186
MDCARL (Modulation Low Carrier Control Register)187
MDCON (Modulation Control Register) .................... 184
MDSRC (Modulation Source Control Register) ........ 185
OPTION_REG (OPTION) ......................................... 161
OSCCON (Oscillator Control) ..................................... 61
OSCSTAT (Oscillator Status) ..................................... 62
OSCTUNE (Oscillator Tuning).................................... 63
PCON (Power Control Register) ................................. 75
PCON (Power Control) ............................................... 75
PIE1 (Peripheral Interrupt Enable 1)........................... 84
PIE2 (Peripheral Interrupt Enable 2)........................... 85
PIR1 (Peripheral Interrupt Register 1) ........................ 86
PIR2 (Peripheral Interrupt Request 2) ........................ 87
PORTA...................................................................... 115
PSTRxCON (PWM Steering Control) ....................... 209
PWM1CON (Enhanced PWM Control) ..................... 209
RCREG ..................................................................... 284
RCSTA (Receive Status and Control)....................... 277
SPBRGH................................................................... 279
SPBRGL ................................................................... 279
Special Function, Summary ........................................ 24
SRCON0 (SR Latch Control 0) ................................. 147
SRCON1 (SR Latch Control 1) ................................. 148
SSPxADD (MSSPx Address and Baud Rate,
I
2
C Mode) ......................................................... 264
SSPxCON1 (MSSPx Control 1) ................................ 261
SSPxCON2 (SSPx Control 2)................................... 262
SSPxCON3 (SSPx Control 3)................................... 263
SSPxMSK (SSPx Mask) ........................................... 264
SSPxSTAT (SSPx Status) ........................................ 260
STATUS...................................................................... 18
T1CON (Timer1 Control)........................................... 171
T1GCON (Timer1 Gate Control)............................... 172
T2CON...................................................................... 177
TRISA (Tri-State PORTA)......................................... 115
TXSTA (Transmit Status and Control) ...................... 276
VREGCON (Voltage Regulator Control) ..................... 91
WDTCON (Watchdog Timer Control) ......................... 95
WPUB (Weak Pull-up PORTB)................................. 117
RESET .............................................................................. 317
Reset................................................................................... 69
Reset Instruction................................................................. 72
Resets................................................................................. 69
Associated Registers .................................................. 76
Revision History ................................................................ 371
S
Shoot-through Current ...................................................... 203
Software Simulator (MPLAB SIM)..................................... 359
SPBRG Register ................................................................. 27
SPBRGH Register ............................................................ 279
SPBRGL Register ............................................................. 279
Special Event Trigger........................................................ 131
Special Function Registers (SFRs)..................................... 24
SPI Mode (MSSPx)
Associated Registers ................................................ 222
SPI Clock .................................................................. 218
SR Latch ........................................................................... 145
Associated registers w/ SR Latch ............................. 149
SRCON0 Register............................................................. 147
SRCON1 Register............................................................. 148
SSP1ADD Register.............................................................28
SSP1BUF Register ............................................................. 28
SSP1CON Register ............................................................ 28
SSP1CON2 Register .......................................................... 28
SSP1CON3 Register .......................................................... 28
SSP1MSK Register ............................................................ 28
SSP1STAT Register ........................................................... 28
SSPxADD Register........................................................... 264
SSPxCON1 Register ........................................................ 261
SSPxCON2 Register ........................................................ 262
SSPxCON3 Register ........................................................ 263
SSPxMSK Register........................................................... 264
SSPxOV ........................................................................... 249
SSPxOV Status Flag ........................................................ 249
SSPxSTAT Register ......................................................... 260
R/W
Bit ..................................................................... 228
Stack................................................................................... 35
Accessing ................................................................... 35
Reset .......................................................................... 37
Stack Overflow/Underflow .................................................. 72
STATUS Register ............................................................... 18
SUBWFB .......................................................................... 319
T
T1CON Register ......................................................... 24, 171
T1GCON Register ............................................................ 172
T2CON (Timer2) Register................................................. 177
T2CON Register ................................................................. 24
Temperature Indicator Module.......................................... 125
Thermal Considerations.................................................... 334
Timer0 .............................................................................. 159
Associated Registers................................................ 161
Operation.................................................................. 159
Specifications ........................................................... 342
Timer1 .............................................................................. 163
Associated registers ................................................. 173
Asynchronous Counter Mode ................................... 165
Reading and Writing......................................... 165
Clock Source Selection ............................................ 164
Interrupt .................................................................... 167
Operation.................................................................. 164
Operation During Sleep ............................................ 167
Oscillator................................................................... 165
Prescaler .................................................................. 165
Specifications ........................................................... 342
Timer1 Gate
Selecting Source .............................................. 165
TMR1H Register....................................................... 163
TMR1L Register ....................................................... 163
Timer2 .............................................................................. 175
Associated registers ................................................. 178
Timer2/4/6
Associated registers ................................................. 178
Timers
Timer1
T1CON ............................................................. 171
T1GCON........................................................... 172
Timer2
T2CON ............................................................. 177
Timing Diagrams
A/D Conversion ........................................................ 344
A/D Conversion (Sleep Mode).................................. 345
Acknowledge Sequence ........................................... 251
Asynchronous Reception.......................................... 274
Asynchronous Transmission .................................... 270
Asynchronous Transmission (Back to Back) ............ 270
Auto Wake-up Bit (WUE) During Normal Operation. 286
Auto Wake-up Bit (WUE) During Sleep .................... 286
Automatic Baud Rate Calibration ............................. 284