Datasheet

PIC12(L)F1840
DS41441B-page 340 Preliminary  2011 Microchip Technology Inc.
FIGURE 30-9: BROWN-OUT RESET TIMING AND CHARACTERISTICS
VBOR
VDD
(Device in Brown-out Reset) (Device not in Brown-out Reset)
33
(1)
Note 1: 64 ms delay only if PWRTE bit in the Configuration Word 1 is programmed to ‘0’.
2 ms delay if PWRTE
= 0 and VREGEN = 1.
Reset
(due to BOR)
VBOR and VHYST
37