Datasheet

PIC12(L)F1840
DS41441B-page 146 Preliminary  2011 Microchip Technology Inc.
FIGURE 18-1: SR LATCH SIMPLIFIED BLOCK DIAGRAM
SRPS
S
R
Q
Q
Note 1: If R = 1 and S = 1 simultaneously, Q = 0, Q = 1
2: Pulse generator causes a 1 Q-state pulse width.
3: Name denotes the connection point at the comparator output.
Pulse
Gen
(2)
SR
Latch
(1)
SRQEN
SRSPE
SRSCKE
SRCLK
SRSC1E
SYNCC1OUT
(3)
SRPR
Pulse
Gen
(2)
SRRPE
SRRCKE
SRCLK
SRRC1E
SYNCC1OUT
(3)
SRLEN
SRNQEN
SRLEN
SRQ
SRNQ
SRI
SRI