Datasheet

PIC12(L)F1501
DS40001615C-page 74  2011-2015 Microchip Technology Inc.
8.3 Register Definitions: Voltage Regulator Control
TABLE 8-1: SUMMARY OF REGISTERS ASSOCIATED WITH POWER-DOWN MODE
REGISTER 8-1: VREGCON: VOLTAGE REGULATOR CONTROL REGISTER
(1)
U-0 U-0 U-0 U-0 U-0 U-0 R/W-0/0 R/W-1/1
— — — — — —VREGPMReserved
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-2 Unimplemented: Read as ‘0’
bit 1 VREGPM: Voltage Regulator Power Mode Selection bit
1 = Low-Power Sleep mode enabled in Sleep
(2)
Draws lowest current in Sleep, slower wake-up
0 = Normal Power mode enabled in Sleep
(2)
Draws higher current in Sleep, faster wake-up
bit 0 Reserved: Read as ‘1’. Maintain this bit set.
Note 1: PIC12F1501 only.
2: See Section 27.0 “Electrical Specifications”.
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register on
Page
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 64
IOCAF
— — IOCAF5 IOCAF4 IOCAF3 IOCAF2 IOCAF1 IOCAF0 103
IOCAN
— — IOCAN5 IOCAN4 IOCAN3 IOCAN2 IOCAN1 IOCAN0 103
IOCAP
— — IOCAP5 IOCAP4 IOCAP3 IOCAP2 IOCAP1 IOCAP0 103
PIE1 TMR1GIE ADIE
— — — — TMR2IE TMR1IE 65
PIE2
— —C1IE— — NCO1IE — — 66
PIE3
— — — — — — CLC2IE CLC1IE 67
PIR1 TMR1GIF ADIF
— — — — TMR2IF TMR1IF 68
PIR2
— —C1IF— — NCO1IF — — 67
PIR3
— — — — — — CLC2IF CLC1IF 70
STATUS
— — —TOPD Z DC C 17
WDTCON
— — WDTPS<4:0> SWDTEN 77
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used in Power-Down mode.