Datasheet
2011-2015 Microchip Technology Inc. DS40001615C-page 147
PIC12(L)F1501
TABLE 19-5: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER1
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ANSELA
— — —ANSA4 — ANSA2 ANSA1 ANSA0 99
APFCON CWG1BSEL CWGA1SEL — — T1GSEL — CLC1SEL NCO1SEL
96
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF 64
PIE1 TMR1GIE
ADIE — — — — TMR2IE TMR1IE 65
PIR1 TMR1GIF
ADIF — — — — TMR2IF TMR1IF 68
TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Count 141*
TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Count 141*
TRISA
— — TRISA5 TRISA4 —
(1)
TRISA2 TRISA1 TRISA0 98
T1CON TMR1CS<1:0> T1CKPS<1:0>
—T1SYNC—TMR1ON
145
T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/
DONE
T1GVAL T1GSS<1:0>
146
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by the Timer1 module.
* Page provides register information.
Note 1: Unimplemented, read as ‘1’.