Datasheet
2016 Microchip Technology Inc. DS20005638A-page 7
MIC5891
3.0 TIMING CONDITIONS
The descriptions of the timing conditions are listed below Figure 3-1.
FIGURE 3-1: Timing Conditions.
L = Low Logic Level, H = High Logic Level, X = Irrelevant, P = Present State, R = Previous State.
TABLE 3-1: TIMING CONDITIONS PARAMETERS
V
DD
= 5.0V, Logic levels are V
DD
and ground.
Reference Parameter Value
A Minimum data active time before clock pulse (data set-up time) 75 ns
B Minimum data active time after clock pulse (data hold time) 75 ns
C Minimum data pulse width 150 ns
D Minimum clock pulse width 150 ns
E Minimum time between clock activation and strobe 300 ns
F Minimum strobe pulse width 100 ns
G Typical time between strobe activation and output transition 1.0 µs
H Turn-off delay See Electrical Characteristics
I Turn-on delay See Electrical Characteristics
CLOCK
DATA IN
STROBE
OUTPUT
ENABLE
OUT
N
B
D
FE
C
G
A
H I
TABLE 3-2: TRUTH TABLE
Serial
Data
Input
Clock
Input
Shift Register
Contents
Serial
Data
Output
Strobe
Input
Latch Contents
Output
Enable
Output Content
I
1
I
2
I
3
... I
N-1
I
N
I
1
I
2
I
3
... I
N-1
I
N
I
1
I
2
I
3
... I
N-1
I
N
HH R
1
R
2
... R
N-2
R
N-1
R
N-1
——
——
LL R
1
R
2
... R
N-2
R
N-1
R
N-1
XR
1
R
2
R
3
... R
N-1
R
N
R
N
——
X X X ... X X X L R
1
R
2
R
3
... R
N-1
R
N
P
1
P
2
P
3
... P
N-1
P
N
P
N
HP
1
P
2
P
3
... P
N-1
P
N
LP
1
P
2
P
3
... P
N-1
P
N
— — — X X X ... X X H L L L ... L L