Datasheet
MCP9808
DS25095A-page 24 © 2011 Microchip Technology Inc.
5.1.3 AMBIENT TEMPERATURE
REGISTER (T
A
)
The MCP9808 uses a band gap temperature sensor
circuit to output analog voltage proportional to absolute
temperature. An internal ΔΣ ADC is used to convert the
analog voltage to a digital word. The digital word is
loaded to a 16-bit read-only Ambient Temperature
register
(T
A
) that contains 13-bit temperature data in
two’s complement format.
The T
A
register bits (T
A
<12:0>) are double-buffered.
Therefore, the user can access the register, while in the
background, the MCP9808 performs an Analog-to-
Digital conversion. The temperature data from the ΔΣ
ADC is loaded in parallel to the T
A
register at t
CONV
refresh rate.
In addition, the T
A
register uses three bits (T
A
<15:13>)
to reflect the Alert pin state. This allows the user to
identify the cause of the Alert output trigger (see
Section 5.2.3 “Alert Output Configuration”); bit 15 is
set to ‘1’ if T
A
is greater than or equal to T
CRIT
, bit 14 is
set to ‘1’ if T
A
is greater than T
UPPER
and bit 13 is set to
‘1’ if T
A
is less than T
LOWER
.
The T
A
register bit assignment and boundary
conditions are described in Register 5-4.
REGISTER 5-4: T
A
: AMBIENT TEMPERATURE REGISTER (→ ADDRESS ‘0000 0101’b)
(1)
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
T
A
vs. T
CRIT
(1)
T
A
vs. T
UPPER
(1)
T
A
vs. T
LOWER
(1)
SIGN 2
7
°C 2
6
°C 2
5
°C 2
4
°C
bit 15 bit 8
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
2
3
°C 2
2
°C 2
1
°C 2
0
°C 2
-1
°C 2
-2
°C
(2)
2
-3
°C
(2)
2
-4
°C
(2)
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15 T
A
vs. T
CRIT
bit
(1)
0 =T
A
< T
CRIT
1 =T
A
≥ T
CRIT
bit 14 T
A
vs. T
UPPER
bit
(1)
0 =T
A
≤ T
UPPER
1 =T
A
> T
UPPER
bit 13 T
A
vs. T
LOWER
bit
(1)
0 =T
A
≥ T
LOWER
1 =T
A
< T
LOWER
bit 12 SIGN bit
0 =T
A
≥ 0°C
1 =T
A
< 0°C
bit 11-0 T
A
: Ambient Temperature bits
(2)
12-bit ambient temperature data in two’s complement format.
Note 1: Bits 15, 14 and 13 are not affected by the status of the Alert Output Configuration (CONFIG<5:0> bits,
Register 5-2).
2: Bits 2, 1 and 0 may remain clear at ‘0’ depending on the status of the Resolution register (Register 5-7).
The power-up default is 0.25°C/bit; bits 1 and 0 remain clear ‘0’.