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ManualsBrandsMicrochip ManualsClockRTC IC MSOP-10 SPI
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2012-2018 Microchip Technology Inc. DS20002300C-page 39
MCP7951X/MCP7952X
6.3 EEPROM
The MCP7952X features 2 Kbits of EEPROM, and the
MCP7951X features 1 Kbit of EEPROM. It is organized
in 8-byte pages with software write protection
configurable through the STATUS register.
6.3.1 WRITE ENABLE AND WRITE
DISABLE
The MCP795XX contains a write enable latch. This
latch must be set before any write operation will be
completed internally. The EEWREN instruction will set
the latch, and the EEWRDI instruction will reset the
latch.
The following is a list of conditions under which the
write enable latch will be reset:
• Power-up
• WRDI instruction successfully executed
• EEWRITE instruction successfully executed
• SRWRITE instruction successfully executed
• IDWRITE instruction successfully executed
• Unlock sequence for protected EEPROM not
followed correctly
FIGURE 6-6: WRITE ENABLE SEQUENCE
FIGURE 6-7: WRITE DISABLE SEQUENCE