Datasheet

 2012-2018 Microchip Technology Inc. DS20002300C-page 36
MCP7951X/MCP7952X
FIGURE 6-2: SRAM/RTCC READ SEQUENCE
6.1.3 CLEAR SRAM INSTRUCTION
The CLRRAM instruction can be used to quickly clear
the contents of SRAM to 0x00. The RTCC registers are
not affected.
The device is selected by pulling CS
low. The 8-bit
CLRRAM instruction is transmitted to the MCP795XX
followed by an 8-bit dummy data byte. CS is driven high
to end the operation (Figure 6-3). The value of the data
byte is ignored.
FIGURE 6-3: CLEAR SRAM SEQUENCE
SO
SI
SCK
CS
0 2345678910111
01010001A
7
A
6
A
5
A
4
A
1
A
0
76543210
Data Out
High-Impedance
A
3
A
2
Address Byte
12
13 14
15 16
17
18
19
20
21 22 23
Instruction
SO
SI
CS
91011 12131415
10010100
7654
210
Instruction Dummy Data Byte
High-Impedance
SCK
0 2345671
8
3