Datasheet
2012-2018 Microchip Technology Inc. DS20002300C-page 16
MCP7951X/MCP7952X
5.3 Timekeeping
The MCP795XX maintains the current time and date
using an external 32.768 kHz crystal or clock source.
Separate registers are used for tracking hundredths of
seconds, seconds, minutes, hours, day of week, date,
month, and year. The MCP795XX automatically
adjusts for months with less than 31 days and
compensates for leap years from 2001 to 2399. The
year is stored as a two-digit value.
Both 12-hour and 24-hour time formats are supported
and are selected using the 12/24
bit.
The day of week value counts from 1 to 7, increments
at midnight, and the representation is user-defined (i.e.,
the MCP795XX does not require 1 to equal Sunday,
etc.).
All time and date values are stored in the registers as
binary-coded decimal (BCD) values. The MCP795XX
will continue to maintain the time and date while
operating off the backup supply.
When reading from the timekeeping registers, the
registers are buffered to prevent errors due to rollover
of counters. The following events cause the buffers to
be updated:
• When a read is initiated from the RTCC registers
(addresses 0x00 to 0x1F)
• During an RTCC register read operation, when
the register address rolls over from 0x1F to 0x00
The timekeeping registers should be read in a single
operation to utilize the on-board buffers and avoid
rollover issues.
5.3.1 DIGIT CARRY RULES
The following list explains which timer values cause a
digit carry when there is a rollover:
• Time of day: from 11:59:59.99 PM to 12:00:00.00
AM (12-hour mode) or 23:59:59.99 to 00:00:00.00
(24-hour mode), with a carry to the Date and
Weekday fields
• Date: carries to the Month field according to
Table 5-3
• Weekday: from 7 to 1 with no carry
• Month: from 12/31 to 01/01 with a carry to the
Year field
• Year: from 99 to 00 with no carry
TABLE 5-3: DAY TO MONTH ROLLOVER
SCHEDULE
5.3.2 GENERATING HUNDREDTH OF
SECONDS
A special algorithm is required to accurately generate
hundredth of seconds. The circuitry utilizes the
4.096 kHz clock signal and counts 41 clock pulses
each for 24 increments of the hundredth of seconds
count. The circuitry then counts 40 clock pulses for the
next increment of the hundredth of second count. This
results in every 25 hundredth of seconds increments
equaling exactly 250 ms. Long term, the hundredth of
seconds frequency will average the desired 100 Hz,
while jitter is minimized short term.
EQUATION 5-2: HUNDREDTH OF
SECONDS GENERATION
Note 1: Loading invalid values into the time and
date registers will result in undefined
operation.
2: To avoid rollover issues when loading
new time and date values, the
oscillator/clock input should be disabled
by clearing the ST bit for External Crystal
mode and the EXTOSC bit for External
Clock Input mode. After waiting for the
OSCRUN bit to clear, the new values can
be loaded and the ST or EXTOSC bit can
then be re-enabled.
Month Name Maximum Date
01 January 31
02 February 28 or 29
(1)
03 March 31
04 April 30
05 May 31
06 June 30
07 July 31
08 August 31
09 September 30
10 October 31
11 November 30
12 December 31
Note 1: 29 during leap years, otherwise 28.
41 clocks 24 counts40 clocks 1 count+
4,096 Hz
--------------------------------------------------------------------------------------------------------------- 25 0 ms=