MCP7951X/MCP7952X Battery-Backed SPI Real-Time Clock/Calendar Part Number SRAM (Bytes) EEPROM (Kbits) Unique ID MCP79510 64 1 Blank MCP79520 64 2 Blank MCP79511 64 1 EUI-48™ MCP79521 64 2 EUI-48™ MCP79512 64 1 EUI-64™ MCP79522 64 2 EUI-64™ Timekeeping Features • Real-Time Clock/Calendar (RTCC): - Hours, minutes, seconds, hundredth of seconds, day of week, date, month, year - Leap year compensated to 2399 - 12/24-hour modes • Oscillator for 32.
MCP7951X/MCP7952X Description The MCP795XX Real-Time Clock/Calendar (RTCC) tracks time using internal counters for hours, minutes, seconds, hundredth of seconds, days, months, years and day of week. Alarms can be configured on all counters up to and including months. For usage and configuration, the MCP795XX supports SPI communications up to 5 MHz. The MCP795XX is designed to operate using a 32.768 kHz tuning fork crystal with external crystal load capacitors.
MCP7951X/MCP7952X FIGURE 1-2: VCC VSS VBAT BLOCK DIAGRAM Power Control and Switchover Power-Fail Timestamp CS SCK SI Control Logic SPI Interface and Addressing SO SRAM EEPROM Configuration Hundredth of Seconds Seconds X1 32.768 kHz Oscillator Clock Divider X2 Minutes Hours Digital Trimming MFP Day of Week Square Wave Output Date Month Alarms Year 2012-2018 Microchip Technology Inc.
MCP7951X/MCP7952X 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings (†) VCC.............................................................................................................................................................................6.5V All inputs and outputs w.r.t. VSS ...........................................................................................................-0.6V to VCC+1.0V Storage temperature ........................................................................
MCP7951X/MCP7952X DC CHARACTERISTICS (Continued) Param. No. D12 Symbol ICCT Characteristic Timekeeping Current Electrical Characteristics: Industrial (I): TA = -40°C to +85°C VCC = 1.8V to 3.6V Min. Typ.(2) Max. Units — — 1.2 µA VCC = 1.8V, CS = VCC, (Note 1) — 1.2 1.8 µA VCC = 3.0V, CS = VCC, (Note 1) — — 2.6 µA VCC = 3.6V, CS = VCC, (Note 1) Test Conditions D13 VTRIP Power-Fail Switchover Voltage 1.3 1.5 1.7 V D14 VBAT Backup Supply Voltage Range 1.3 — 3.
MCP7951X/MCP7952X TABLE 1-2: AC CHARACTERISTICS Electrical Characteristics: Industrial (I): TA = -40°C to +85°C AC CHARACTERISTICS Param. Symbol No. Characteristic Min. Typ. Max. Units — — 5 MHz VCC = 1.8V to 3.6V Test Conditions 1 FCLK Clock Frequency — — 3 MHz 1.8V ≤Vcc < 2.5V 2 TCSS CS Setup Time 100 — — ns 2.5V ≤Vcc < 3.6V 150 — — ns 1.8V ≤Vcc < 2.5V 3 TCSH CS Hold Time 100 — — ns 2.5V ≤Vcc < 3.6V 150 — — ns 1.8V ≤Vcc < 2.
MCP7951X/MCP7952X FIGURE 1-1: SERIAL INPUT TIMING 4 CS 12 2 7 10 SCK 6 MSB In LSB In High-Impedance SO FIGURE 1-2: 3 9 5 SI 8 11 SERIAL OUTPUT TIMING CS 9 3 10 SCK 13 14 MSB Out SO 15 LSB Out Don’t Care SI FIGURE 1-3: POWER SUPPLY TRANSITION TIMING VCC VTRIP(MAX) VTRIP(MIN) 17 2012-2018 Microchip Technology Inc.
MCP7951X/MCP7952X 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data represented may be outside the specified operating range (e.g., outside specified power supply range) and therefore, outside the warranted range.
MCP7951X/MCP7952X 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE 10-Pin MSOP 10-Pin TDFN X1 X2 VBAT 1 2 3 1 2 3 Quartz Crystal Input, External Oscillator Input Quartz Crystal Output Battery Backup Supply Input CS VSS SI SO SCK MFP VCC 4 5 6 7 8 9 10 4 5 6 7 8 9 10 Chip Select Input Ground Serial Data Input Serial Data Output Serial Clock Input Multifunction Pin Primary Power Supply Name 3.
MCP7951X/MCP7952X 4.0 SPI BUS OPERATION The MCP795XX is designed to interface directly with the Serial Peripheral Interface (SPI) port of many of today’s popular microcontroller families, including Microchip’s PIC® microcontrollers. It may also interface with microcontrollers that do not have a built-in SPI port by using discrete I/O lines programmed properly in software to match the SPI protocol. TABLE 4-1: The MCP795XX contains an 8-bit instruction register.
MCP7951X/MCP7952X 5.0 FUNCTIONAL DESCRIPTION The MCP795XX is a highly-integrated Real-Time Clock/Calendar (RTCC). Using an on-board, low-power oscillator, the current time is maintained in hundredths of seconds, seconds, minutes, hours, day of week, date, month, and year. The MCP795XX also features 64 bytes of general purpose SRAM, either 2 Kbits (MCP7952X) or 1 Kbit (MCP7951X) of EEPROM, and 16 bytes of protected EEPROM.
MCP7951X/MCP7952X FIGURE 5-2: MEMORY MAP FOR MCP7952X RTCC Registers/SRAM EEPROM 0x00 0x00 Time and Date 0x07 0x08 0x0B 0x0C Configuration and Trimming Alarm 0 0x11 0x12 EEPROM (256 Bytes) Alarm 1 0x17 0x18 Power-Fail/Power-Up Timestamps 0x1F 0x20 SRAM (64 Bytes) 0xFF Protected EEPROM 0x5F 0x60 0x00 Protected EEPROM (16 Bytes) EUI-48/EUI-64 Node Address Unimplemented; device does not respond 0x07 0x08 Lockable User ID (16 Bytes) 0xFF 2012-2018 Microchip Technology Inc.
MCP7951X/MCP7952X TABLE 5-1: DETAILED RTCC REGISTER MAP Addr. Register Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Section 5.
MCP7951X/MCP7952X 5.2 Oscillator Configurations EQUATION 5-1: The MCP795XX can be operated in two different oscillator configurations: using an external crystal or using an external clock input. 5.2.1 By using external load capacitors, the MCP795XX allows for a wide selection of crystals. Suitable crystals have a load capacitance (CL) of 6-9 pF. Crystals with a load capacitance of 12.5 pF are not recommended. Figure 5-3 shows the pin connections when using an external crystal.
MCP7951X/MCP7952X FIGURE 5-4: SUGGESTED PLACEMENT OF THE OSCILLATOR CIRCUIT Single-Sided and In-line Layouts: Copper Pour (tied to ground) Fine-Pitch (Dual-Sided) Layouts: Oscillator Crystal Top Layer Copper Pour (tied to ground) Bottom Layer Copper Pour (tied to ground) X1 X1 CX1 X2 GND CX2 CX1 Oscillator Crystal GND CX2 ` X2 DEVICE PINS DEVICE PINS 5.2.2 5.2.3 EXTERNAL CLOCK INPUT A 32.768 kHz external clock source can be connected to the X1 pin (Figure 5-5).
MCP7951X/MCP7952X 5.3 Timekeeping The MCP795XX maintains the current time and date using an external 32.768 kHz crystal or clock source. Separate registers are used for tracking hundredths of seconds, seconds, minutes, hours, day of week, date, month, and year. The MCP795XX automatically adjusts for months with less than 31 days and compensates for leap years from 2001 to 2399. The year is stored as a two-digit value.
MCP7951X/MCP7952X REGISTER 5-1: RTCHSEC: TIMEKEEPING HUNDREDTH OF SECONDS VALUE REGISTER (ADDRESS 0x00) R/W-0 R/W-0 HSECTEN3 HSECTEN2 R/W-0 R/W-0 R/W-0 HSECTEN1 HSECTEN0 HSECONE3 R/W-0 HSECONE2 R/W-0 R/W-0 HSECONE1 HSECONE0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is clear x = Bit is unknown bit 7-4 HSECTEN<3:0>: Binary-Coded Decimal Value of Hundredth of Second’s Tens Digit Contains a value
MCP7951X/MCP7952X REGISTER 5-4: RTCHOUR: TIMEKEEPING HOURS VALUE REGISTER (ADDRESS 0x03) R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 TRIMSIGN 12/24 AM/PM HRTEN1 HRTEN0 HRONE3 HRONE2 HRONE1 HRONE0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is clear x = Bit is unknown If 12/24 = 1 (12-hour format): bit 7 TRIMSIGN: Trim Sign bit 1 = Add clocks to correct for slow time 0 = Subtract clocks t
MCP7951X/MCP7952X REGISTER 5-5: RTCWKDAY: TIMEKEEPING WEEKDAY VALUE REGISTER (ADDRESS 0x04) U-0 U-0 R-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-1 — — OSCRUN PWRFAIL VBATEN WKDAY2 WKDAY1 WKDAY0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is clear x = Bit is unknown bit 7-6 Unimplemented: Read as ‘0’ bit 5 OSCRUN: Oscillator Status bit 1 = Oscillator is enabled and running 0 = Oscillator has stopped or
MCP7951X/MCP7952X REGISTER 5-7: RTCMTH: TIMEKEEPING MONTH VALUE REGISTER (ADDRESS 0x06) U-0 U-0 R-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-1 — — LPYR MTHTEN0 MTHONE3 MTHONE2 MTHONE1 MTHONE0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is clear x = Bit is unknown bit 7-6 Unimplemented: Read as ‘0’ bit 5 LPYR: Leap Year bit 1 = Year is a leap year 0 = Year is not a leap year bit 4 MTHTEN0: Binary-Code
MCP7951X/MCP7952X 5.4 TABLE 5-6: Alarms ALARM 1 MASKS The MCP795XX features two independent alarms. Each alarm can be used to either generate an interrupt at a specific time in the future, or to generate a periodic interrupt every second (Alarm 1 only), minute, hour, day, day of week, or month. ALM1MSK<2:0> Alarm 1 Asserts on Match of 000 Seconds 001 Minutes 010 Hours There is a separate interrupt flag, ALMxIF, for each alarm.
MCP7951X/MCP7952X FIGURE 5-7: ALARM BLOCK DIAGRAM Timekeeping Registers Alarm 1 Registers RTCHSEC ALM1HSEC ALM0SEC RTCSEC ALM1SEC ALM0MIN RTCMIN ALM1MIN ALM0HOUR RTCHOUR ALM1HOUR ALM0WKDAY RTCWKDAY ALM1WKDAY ALM0DATE RTCDATE ALM1DATE ALM0MTH RTCMTH Alarm 0 Registers Alarm 0 Mask Comparator Comparator Set ALM0IF ALM0MSK<2:0> 5.4.
MCP7951X/MCP7952X REGISTER 5-9: ALM1HSEC: ALARM 1 HUNDREDTHS OF SECONDS VALUE REGISTER (ADDRESS 0x12) R/W-0 R/W-0 HSECTEN3 HSECTEN2 R/W-0 R/W-0 R/W-0 HSECTEN1 HSECTEN0 HSECONE3 R/W-0 HSECONE2 R/W-0 R/W-0 HSECONE1 HSECONE0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is clear x = Bit is unknown bit 7-4 HSECTEN<3:0>: Binary-Coded Decimal Value of Hundredth of Second’s Tens Digit Contains a value fr
MCP7951X/MCP7952X REGISTER 5-11: ALMxMIN: ALARM 0/1 MINUTES VALUE REGISTER (ADDRESSES 0x0D/0x14) U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 — MINTEN2 MINTEN1 MINTEN0 MINONE3 MINONE2 MINONE1 MINONE0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is clear x = Bit is unknown bit 7 Unimplemented: Read as ‘0’ bit 6-4 MINTEN<2:0>: Binary-Coded Decimal Value of Minute’s Tens Digit Contains a valu
MCP7951X/MCP7952X REGISTER 5-13: ALMxWKDAY: ALARM 0/1 WEEKDAY VALUE REGISTER (ADDRESSES 0x0F/0x16) U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-1 — ALMxMSK2 ALMxMSK1 ALMxMSK0 ALMxIF WKDAY2 WKDAY1 WKDAY0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is clear x = Bit is unknown bit 7 Unimplemented: Read as ‘0’ bit 6-4 ALMxMSK<2:0>: Alarm Mask bits 000 = Seconds match 001 = Minutes match 010 = H
MCP7951X/MCP7952X REGISTER 5-15: ALM0MTH: ALARM 0 MONTH VALUE REGISTER (ADDRESS 0x11) U-0 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-1 — — — MTHTEN0 MTHONE3 MTHONE2 MTHONE1 MTHONE0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is clear x = Bit is unknown bit 7-5 Unimplemented: Read as ‘0’ bit 4 MTHTEN0: Binary-Coded Decimal Value of Month’s Tens Digit Contains a value of 0 or 1 bit 3-0 MTHONE<3:0
MCP7951X/MCP7952X 5.5 MFP Output The MCP795XX features Square Wave Clock Output and Alarm Interrupt Output modes through the MFP pin. If the SQWEN bit is set, then MFP operates in Square Wave Clock Output mode. The alarm outputs will remain active on the MFP pin while operating from the backup power supply. The Square Wave Clock Output is disabled while operating from the backup power supply.
MCP7951X/MCP7952X REGISTER 5-16: CONTROL: RTCC CONTROL REGISTER (ADDRESS 0x08) U-x R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 — SQWEN ALM1EN ALM0EN EXTOSC CRSTRIM SQWFS1 SQWFS0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is clear x = Bit is unknown bit 7 Unimplemented: Read as ‘1’ bit 6 SQWEN: Square Wave Output Enable bit 1 = Enable Square Wave Clock Output mode 0 = Disable Square Wave Clo
MCP7951X/MCP7952X 5.6 Digital Trimming The MCP795XX features digital trimming to correct for inaccuracies of the external crystal or clock source, up to roughly ±259 ppm when CRSTRIM = 0. In addition to compensating for intrinsic inaccuracies in the clock, this feature can also be used to correct for error due to temperature variation. This can enable the user to achieve high levels of accuracy across a wide temperature operating range.
MCP7951X/MCP7952X 5.6.1 CALIBRATION In order to perform calibration, the number of error clock pulses per minute must be found and the corresponding trim value must be loaded into TRIMVAL<7:0>. There are two methods for determining the trim value. The first method involves measuring an output frequency directly and calculating the deviation from ideal. The second method involves observing the number of seconds gained or lost over a period of time.
MCP7951X/MCP7952X 5.6.2 COARSE TRIM MODE When CRSTRIM = 1, Coarse Trim mode is enabled. While in this mode, the MCP795XX will apply trimming every second. If SQWEN is set, the CLKOUT pin will output a trimmed 1 Hz nominal clock signal. Because trimming is applied every second rather than every minute, each step of the TRIMVAL<7:0> value has a larger effect on the resulting time deviation and output clock frequency.
MCP7951X/MCP7952X 5.7 5.7.1 Battery Backup The MCP795XX features a backup power supply input (VBAT) that can be used to provide power to the timekeeping circuitry, RTCC registers, and SRAM while primary power is unavailable. The MCP795XX will automatically switch to backup power when VCC falls below VTRIP, and back to VCC when it is above VTRIP.
MCP7951X/MCP7952X REGISTER 5-18: PWRxxMIN: POWER-DOWN/POWER-UP TIMESTAMP MINUTES VALUE REGISTER (ADDRESSES 0x18/0x1C) U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 — MINTEN2 MINTEN1 MINTEN0 MINONE3 MINONE2 MINONE1 MINONE0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is clear x = Bit is unknown bit 7 Unimplemented: Read as ‘0’ bit 6-4 MINTEN<2:0>: Binary-Coded Decimal Value of Minute’s Tens
MCP7951X/MCP7952X REGISTER 5-20: PWRxxDATE: POWER-DOWN/POWER-UP TIMESTAMP DATE VALUE REGISTER (ADDRESSES 0x1A/0x1E) U-0 U-0 R/W-0 — — DATETEN1 R/W-0 R/W-0 DATETEN0 DATEONE3 R/W-0 R/W-0 R/W-0 DATEONE2 DATEONE1 DATEONE0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is clear x = Bit is unknown bit 7-6 Unimplemented: Read as ‘0’ bit 5-4 DATETEN<1:0>: Binary-Coded Decimal Value of Date’s Tens Digi
MCP7951X/MCP7952X 6.0 There is no limit to the number of bytes that can be written in a single command. However, because the RTCC registers and SRAM are separate blocks, writing past the end of each block will cause the internal Address Pointer to roll over to the beginning of the same block. Specifically, the Address Pointer will roll over from 0x1F to 0x00, and from 0x5F to 0x20. ON-BOARD MEMORY The MCP7952X has 2 Kbits (256 bytes) of EEPROM, while the MCP7951X has 1 Kbit (128 bytes) of EEPROM.
MCP7951X/MCP7952X FIGURE 6-2: SRAM/RTCC READ SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 SCK Instruction SI 0 0 0 1 0 Address Byte 0 1 1 A7 A6 A5 A4 A3 A2 A1 A0 Data Out High-Impedance 7 SO 6.1.3 CLEAR SRAM INSTRUCTION 5 4 3 2 1 0 The device is selected by pulling CS low. The 8-bit CLRRAM instruction is transmitted to the MCP795XX followed by an 8-bit dummy data byte. CS is driven high to end the operation (Figure 6-3).
MCP7951X/MCP7952X 6.2 Status Register The STATUS register contains the BP<1:0>, WEL and WIP bits. The STATUS register is accessed using the SRREAD and SRWRITE instructions. The Block Protection (BP<1:0>) bits are used to set the block write protection for the EEPROM array according to Table 6-1. These bits are set by the user issuing the SRWRITE instruction. These bits are nonvolatile. The WIP bit indicates whether the MCP795XX is busy with a nonvolatile memory write operation.
MCP7951X/MCP7952X FIGURE 6-4: WRITE STATUS REGISTER SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 0 SCK Instruction 0 SI 0 0 0 Data to STATUS Register 0 0 0 7 1 6 5 4 3 2 High-Impedance SO 6.2.2 STATUS REGISTER READ SEQUENCE The device is selected by pulling CS low. The 8-bit SRREAD instruction is transmitted to the MCP795XX. The STATUS register value is then shifted out on the SO pin. The read operation is terminated by driving CS high (Figure 6-5).
MCP7951X/MCP7952X 6.3 The following is a list of conditions under which the write enable latch will be reset: EEPROM The MCP7952X features 2 Kbits of EEPROM, and the MCP7951X features 1 Kbit of EEPROM. It is organized in 8-byte pages with software write protection configurable through the STATUS register. 6.3.1 • • • • • • WRITE ENABLE AND WRITE DISABLE The MCP795XX contains a write enable latch. This latch must be set before any write operation will be completed internally.
MCP7951X/MCP7952X 6.3.2 EEPROM READ SEQUENCE The device is selected by pulling CS low. The 8-bit EEREAD instruction is transmitted to the MCP795XX followed by an 8-bit address. See Figure 6-8 for more details. After the correct EEREAD instruction and address are sent, the data stored in the EEPROM at the selected address is shifted out on the SO pin. Data stored in the memory at the next address can be read sequentially by continuing to provide clock pulses to the slave.
MCP7951X/MCP7952X FIGURE 6-9: EEPROM BYTE WRITE SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 SCK Instruction SI 0 0 0 0 0 Address Byte 0 Data Byte 0 A7 A6 A5 A4 A3 A2 A1 A0 1 Twc 7 6 5 4 3 2 1 0 High-Impedance SO FIGURE 6-10: EEPROM PAGE WRITE SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 SCK Address Byte Instruction SI 0 0 0 0 0 0 1 Data Byte 1 0 A7 A6 A5 A4 A3 A2 A1 A0 7 6 5 4 3 2 1 0 CS
MCP7951X/MCP7952X 6.4.2 PROTECTED EEPROM UNLOCK SEQUENCE The protected EEPROM block requires a special unlock sequence to prevent unintended writes, utilizing the UNLOCK instruction. Before performing the unlock sequence, the WEL bit must first be set by executing an EEWREN instruction (see Section 6.3.1 “Write Enable and Write Disable” for details). To unlock the block, the following sequence must be followed after setting the WEL bit: 1. 2. 3.
MCP7951X/MCP7952X FIGURE 6-11: PROTECTED EEPROM READ SEQUENCE CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 SCK Instruction SI 0 0 1 1 0 Address Byte 0 1 1 0 0 0 A3 A2 A1 A0 0 Data Out High-Impedance 7 SO FIGURE 6-12: 6 5 4 3 2 1 0 PROTECTED EEPROM UNLOCK AND PAGE WRITE SEQUENCE 1. UNLOCK Instruction with 0x55 Data Byte CS 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SCK Data Byte Instruction SI 2.
MCP7951X/MCP7952X 6.5 6.5.1.2 Preprogrammed EUI-48™ or EUI-64™ Node Address The MCP795X1 and MCP795X2 are programmed at the factory with a globally unique node address stored in the protected EEPROM block. 6.5.1 EUI-48 NODE ADDRESS (MCP795X1) The 6-byte EUI-48 node address value of the MCP795X1 is stored in protected EEPROM locations 0x02 through 0x07, as shown in Figure 6-13.
MCP7951X/MCP7952X FIGURE 6-14: Description EUI-64 NODE ADDRESS PHYSICAL MEMORY MAP EXAMPLE (MCP795X2) 24-bit Organizationally Unique Identifier Data 00h Array Address 00h 04h A3h 40-bit Extension Identifier 12h 34h 56h 78h 90h 07h Corresponding EUI-64™ Node Address: 00-04-A3-12-34-56-78-90 2012-2018 Microchip Technology Inc.
MCP7951X/MCP7952X 7.0 PACKAGING INFORMATION 7.1 Package Marking Information 10-Lead MSOP (3x3 mm) Example 79520I 640I7L 10-Lead TDFN (03x03x0.8 mm) Example 520I 1640 I7L 1st Line Marking Codes Part Number MSOP TDFN MCP79510 79510I 510I MCP79520 79520I 520I MCP79511 79511I 511I MCP79521 79521I 521I MCP79512 79512I 512I MCP79522 79522I 522I Note: Legend: XX...
MCP7951X/MCP7952X 10-Lead Plastic Micro Small Outline Package (MS) [MSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 0.20 H D D 2 A N E 2 E1 2 E1 E 0.20 H 1 0.25 C 2 e B 8X b 0.13 C A B TOP VIEW H C SEATING PLANE A2 A 8X 0.10 C A1 SEE DETAIL A SIDE VIEW END VIEW Microchip Technology Drawing C04-021D Sheet 1 of 2 2012-2018 Microchip Technology Inc.
MCP7951X/MCP7952X 10-Lead Plastic Micro Small Outline Package (MS) [MSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.
MCP7951X/MCP7952X 10-Lead Plastic Micro Small Outline Package (MS) [MSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging G SILK SCREEN Z C G1 Y1 X1 E RECOMMENDED LAND PATTERN Units Dimension Limits Contact Pitch E Contact Pad Spacing C Overall Width Z Contact Pad Width (X10) X1 Contact Pad Length (X10) Y1 Distance Between Pads (X5) G1 Distance Between Pads (X8) G MIN MILLIMETERS NOM 0.50 BSC 4.40 MAX 5.
MCP7951X/MCP7952X Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2012-2018 Microchip Technology Inc.
MCP7951X/MCP7952X Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging 2012-2018 Microchip Technology Inc.
MCP7951X/MCP7952X APPENDIX A: REVISION HISTORY Revision A (04/2012) Initial release of this document.
MCP7951X/MCP7952X THE MICROCHIP WEBSITE CUSTOMER SUPPORT Microchip provides online support via our website at www.microchip.com. This website is used as a means to make files and information easily available to customers.
MCP7951X/MCP7952X PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. Not every possible ordering combination is listed below. PART NO. X Device Memory X (1) – [X](1) Unique ID Tape & Reel Option X /XX Temp.
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
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