Datasheet

MCP6291/1R/2/3/4/5
DS21812E-page 16 © 2007 Microchip Technology Inc.
4.9.3.2 Cascaded Gain
Figure 4-11 shows a cascaded gain circuit configura-
tion with Chip Select. Op amps A and B are configured
in a non-inverting amplifier configuration. In this config-
uration, it is important to note that the input offset volt-
age of op amp A is amplified by the gain of op amp A
and B, as shown below:
Therefore, it is recommended to set most of the gain
with op amp A and use op amp B with relatively small
gain (e.g., a unity-gain buffer).
FIGURE 4-11: Cascaded Gain Circuit
Configuration.
4.9.3.3 Difference Amplifier
Figure 4-12 shows op amp A as a difference amplifier
with Chip Select. In this configuration, it is
recommended to use well-matched resistors (e.g.,
0.1%) to increase the Common Mode Rejection Ratio
(CMRR). Op amp B can be used for additional gain or
as a unity-gain buffer to isolate the load from the
difference amplifier.
FIGURE 4-12: Difference Amplifier Circuit.
4.9.3.4 Buffered Non-inverting Integrator
Figure 4-13 shows a lossy non-inverting integrator that
is buffered and has a Chip Select input. Op amp A is
configured as a non-inverting integrator. In this config-
uration, matching the impedance at each input is
recommended. R
F
is used to provide a feedback loop
at frequencies << 1/(2πR
1
C
1
) and makes this a lossy
integrator (it has a finite gain at DC). Op amp B is used
to isolate the load from the integrator.
FIGURE 4-13: Buffered Non-inverting
Integrator with Chip Select.
4.9.3.5 Inverting Integrator with Active
Compensation and
Chip Select
Figure 4-14 uses an active compensator (op amp B) to
compensate for the non-ideal op amp characteristics
introduced at higher frequencies. This circuit uses
op amp B as a unity-gain buffer to isolate the
integration capacitor C
1
from op amp A and drives the
capacitor with low-impedance source. Since both op
amps are matched very well, they provide a high quality
integrator.
FIGURE 4-14: Integrator Circuit with Active
Compensation.
V
OUT
V
IN
G
A
G
B
V
OSA
G
A
G
B
V
OSB
G
B
++=
Where:
G
A
= op amp A gain
G
B
= op amp B gain
V
OSA
= op amp A input offset voltage
V
OSB
= op amp B input offset voltage
A
B
CS
R
4
R
3
R
2
R
1
V
IN
V
OUT
MCP6295
A
B
CS
R
2
R
1
V
IN2
V
IN1
R
2
R
1
V
OUT
R
4
R
3
MCP6295
A
B
CS
R
F
C
1
R
2
C
2
R
1
V
IN
V
OUT
MCP6295
R
1
C
1
R
2
R
F
||
()C
2
=
A
CS
B
V
IN
V
OUT
R
1
C
1
MCP6295