Datasheet

2012-2013 Microchip Technology Inc. DS20002286B-page 61
MCP3911
7.6 CONFIG Register –
Configuration Register
Name Bits Address Cof
CONFIG 16
0x0C
R/W
REGISTER 7-6: CONFIG REGISTER
R/W-0 R/W-0 R/W-0 R/W-1 R/W-1 R/W-1 R/W-1 R/W-0
PRE<1> PRE<0> OSR<2> OSR<1> OSR<0> DITHER<1> DITHER<0> AZ_FREQ
bit 15 bit 8
R/W-0 R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-1 U-0
RESET<1> RESET<0> SHUT-
DOWN<1>
SHUT-
DOWN<0>
VREFEXT CLKEXT
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 15-14 PRE<1:0>: Analog Master Clock (AMCLK) Prescaler Value
11 = AMCLK = MCLK/8
10 = AMCLK = MCLK/4
01 = AMCLK = MCLK/2
00 = AMCLK = MCLK (DEFAULT)
bit 13-11 OSR<2:0>: Oversampling Ratio for Delta-Sigma A/D Conversion (ALL CHANNELS, f
d
/f
S
)
111 = 4096 (f
d
= 244 sps for MCLK = 4 MHz, f
s
= AMCLK = 1 MHz)
110 = 2048 (f
d
= 488 sps for MCLK = 4 MHz, f
s
= AMCLK = 1 MHz)
101 = 1024 (f
d
= 976 sps for MCLK = 4 MHz, f
s
= AMCLK = 1 MHz)
100 = 512 (f
d
= 1.953 ksps for MCLK = 4 MHz, f
s
= AMCLK = 1 MHz)
011 = 256 (f
d
= 3.90625 ksps for MCLK = 4 MHz, f
s
= AMCLK = 1 MHz) (DEFAULT)
010 = 128 (f
d
= 7.8125 ksps for MCLK = 4 MHz, f
s
= AMCLK = 1 MHz)
001 = 64 (f
d
= 15.625 ksps for MCLK = 4 MHz, f
s
= AMCLK = 1 MHz)
000 = 32 (f
d
= 31.25 ksps for MCLK = 4 MHz, f
s
= AMCLK = 1 MHz)
bit 10-9 DITHER<1:0>: Control for dithering circuit for idle tones cancellation and improved THD
11 = Dithering ON, both channels, Strength = Maximum(MCP3901 Equivalent) - (DEFAULT)
10 = Dithering ON, both channels, Strength = Medium
01 = Dithering ON, both channels, Strength = Minimum
00 = Dithering turned OFF
bit 8 AZ_FREQ: Auto-zero frequency setting
1 = Auto-zeroing algorithm running at higher speed
0 = Auto-zeroing algorithm running at lower speed (Default)
bit 7-6 RESET<1:0>: Reset mode setting for ADCs
11 = Both CH0 and CH1 ADC are in reset mode
10 = CH1 ADC in Reset mode
01 = CH0 ADC in Reset mode
00 = Neither ADC in Reset mode (default)
bit 5-4 SHUTDOWN<1:0>: Shutdown mode setting for ADCs
11 = Both CH0 and CH1 ADC in Shutdown
10 = CH1 ADC in Shutdown
01 = CH0 ADC in Shutdown
00 = Neither Channel in Shutdown (default)