Datasheet

MCP3911
DS20002286B-page 6  2012-2013 Microchip Technology Inc.
1.2 Serial Interface Characteristics
Operating Current, Digital I
DD,D
— 0.2 0.3 mA MCLK = 4 MHz,
proportional to MCLK
— 0.7 — mA MCLK = 16 MHz,
proportional to MCLK
Shutdown Current, Ana-
log
I
DDS,A
—— 1 µAAV
DD
pin only (Note 3)
Shutdown Current, Digital I
DDS,D
—— 1 µADV
DD
pin only (Note 3)
TABLE 1-2: SERIAL DC CHARACTERISTICS TABLE
Electrical Specifications: Unless otherwise indicated, all parameters apply at DV
DD
= 2.7 to 3.6V,
T
A
= -40°C to +125°C, C
LOAD
= 30 pF, applies to all digital I/O.
Characteristics Sym Min Typ Max Units Test Conditions
High-level Input Voltage V
IH
0.7 DV
DD
— V Schmitt Triggered
Low-level Input Voltage V
IL
——0.3 DV
DD
V Schmitt Triggered
Input Leakage Current
I
LI
——±1µACS = DV
DD
,
V
IN
= D
GND
to DV
DD
Output leakage Current
I
LO
——±1µACS = DV
DD
,
V
OUT
= D
GND
or DV
DD
Hysteresis
of Schmitt Trigger Inputs
V
HYS
— 200 — mV Note 2, DV
DD
= 3.3V only
Low-level Output Voltage V
OL
——0.4VI
OL
=+2.1mA, DV
DD
=3.3V
High-level Output Voltage V
OH
DV
DD
-0.5 — — V I
OH
=-2.1mA, DV
DD
=3.3V
Internal Capacitance
(all inputs and outputs)
C
INT
——7 pFT
A
= +25°C, SCK = 1.0 MHz,
DV
DD
=3.3V (Note 1)
Note 1: This parameter is periodically sampled and not 100% tested.
2: This parameter is established by characterization and not production tested.
TABLE 1-1: ANALOG SPECIFICATIONS TARGET TABLE (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all parameters apply at AV
DD
= DV
DD
= 2.7V to 3.6V, MCLK = 4 MHz;
PRE<1:0> = 00; OSR = 256; GAIN = 1; VREFEXT =
0, CLKEXT = 1, AZ_FREQ = 0, DITHER<1:0> = 11, BOOST<1:0> = 10;
V
CM
=0V; T
A
= -40°C to +125°C; V
IN
=1.2V
PP
= 424 mV
RMS
at 50/60 Hz on both channels.
Characteristic Sym Min Typ Max Units Conditions
Note 1: This specification implies that the ADC output is valid over this entire differential range and that there is no distortion or
instability across this input range. Dynamic Performance specified at -0.5 dB below the maximum signal range,
V
IN
=1.2V
PP
= 424mV
RMS
, V
REF
= 1.2V at 50/60 Hz. See Section 4.0, Terminologies And Formulas for definition.
This parameter is established by characterization and not 100% tested. See performance graphs for other than default
settings provided here.
2: For these operating currents, the following configuration bit settings apply: SHUTDOWN<1:0> =
00,
RESET<1:0> =
00, VREFEXT = 0, CLKEXT = 0.
3: For these operating currents, the following configuration bit settings apply: SHUTDOWN<1:0> =
11, VREFEXT = 1,
CLKEXT =
1.
4: Applies to all gains. Offset and gain errors depend on PGA gain setting, see Section 2.0, Typical Performance
Curves for typical performance.
5: Outside of this range, the ADC accuracy is not specified. An extended input range of ±2 V can be applied continuously
to the part with no damage.
6: For proper operation and optimizing ADC accuracy, AMCLK should be limited to the maximum frequency defined in
Ta b le 5- 2 as a function of the BOOST and PGA settings chosen. MCLK can take larger values as long as the prescaler
settings (PRE<1:0>) limit AMCLK = MCLK/PRESCALE in the defined range in Table 5-2.