Datasheet
2012-2013 Microchip Technology Inc. DS20002286B-page 53
MCP3911
7.0 INTERNAL REGISTERS
The addresses associated with the internal registers
are listed below, followed by a detailed description of
the registers. All registers are split in 8-bit long registers
which can be addressed and read separately. Read
and Write modes define the groups and types of
registers for continuous read/write communication or
looping on address sets as shown in Table 7-2.
TABLE 7-1: REGISTER MAP
Address Name Bits R/W Description
0x00 CHANNEL0 24 R Channel 0 ADC 24-bit Data <23:0>, MSB first
0x03 CHANNEL1 24 R Channel 1 ADC 24-bit Data <23:0>, MSB first
0x06 MOD 8 R/W Modulator Output Register for both ADC channels
0x07 PHASE 16 R/W Phase Delay Configuration Register
0x09 GAIN 8 R/W Gain and Boost Configuration Register
0x0A STATUSCOM 16 R/W Status and Communication Register
0x0C CONFIG 16 R/W Configuration Register
0x0E OFFCAL_CH0 24 R/W Offset Correction Register - Channel 0
0x11 GAINCAL_CH0 24 R/W Gain Correction Register - Channel 0
0x14 OFFCAL_CH1 24 R/W Offset Correction Register - Channel 1
0x17 GAINCAL_CH1 24 R/W Gain Correction Register - Channel 1
0x1A VREFCAL 8 R/W Internal Voltage reference Temperature Coefficient Adjustment
Register