Datasheet
2012-2013 Microchip Technology Inc. DS20002286B-page 41
MCP3911
5.12.1 DIGITAL OFFSET ERROR
CALIBRATION
The OFFCAL_CHn registers are 23-bit plus sign two’s
complement register, which LSB value is the same as
the Channel ADC Data. These two registers are then
added bit-by-bit to the ADC output codes, if the
EN_OFFCAL bit is enabled. Enabling the EN_OFFCAL
bit does not create any pipeline delay, the offset
addition is instantaneous. For low OSR values, only the
significant digits are added to the output (up to the
resolution of the ADC. For example, at OSR = 32, only
the 17 first bits are added).
The offset is not added when the corresponding
channel is in Reset or Shutdown mode. The
corresponding input voltage offset value added by each
LSB in these 24-bit registers is shown in Equation 5-9.
EQUATION 5-9:
This register is a “Don't Care” if EN_OFFCAL = 0
(Offset calibration disabled), but its value is not cleared
by the EN_OFFCAL bit.
5.12.2 DIGITAL GAIN ERROR
CALIBRATION
This register is 24-bit signed MSB first coding with a
range of -1x to +0.9999999x (from 0x80000 to
0x7FFFFF). The gain calibration adds 1x to this
register and multiplies it to the output code of the
channel bit-by-bit, after offset calibration. The range of
the gain calibration is thus from 0x to 1.9999999x (from
0x80000 to 0x7FFFFF). The LSB corresponds to a 2
-23
increment in the multiplier.
Enabling EN_GAINCAL creates a pipeline delay of
24 DMCLK periods on both channels. All data ready
pulses are delayed by 24 DMCLK periods, starting
from the data ready, following the command enabling
EN_GAINCAL bit. The gain calibration is effective on
the next data ready, following the command enabling
EN_GAINCAL bit.
The digital gain calibration does not function when the
corresponding channel is in Reset or Shutdown mode.
The gain multiplier value for an LSB in these 24-bit
registers is shown in Equation .
EQUATION 5-10:
This register is a “Don't Care” if EN_GAINCAL = 0
(Offset calibration disabled), but its value is not cleared
by the EN_GAINCAL bit.
If the output result is out of bounds after all calibrations
are performed, the output data on channel is kept to
either 7FFF or 8000 in 16-bit mode or 7FFFFF or 8000
in 24-bit mode.
OFFSET(1LSB) = V
REF
/(PGA_CHn x 1.5 x 8388608)
GAIN (1LSB) = 1/8388608