Datasheet

MCP3911
DS20002286B-page 2  2012-2013 Microchip Technology Inc.
Functional Block Diagram
CH0+
CH0-
CH1+
CH1-
DUAL '6ADC
ANALOG DIGITAL
SINC
3
+
SINC
1
-
+
PGA
-
+
PGA
'6
Modulator
AMCLK
DMCLK/DRCLK
Phase
Shifter
)
PHASE <11:0>
DATA_CH0
<23:0>
MOD<7:0>
REFIN/OUT
REFIN-
AV
DD
A
GND
D
GND
DV
DD
MOD<3:0>
MOD<7:4>
POR
AV
DD
Monitoring
'6
Modulator
V
REF
+V
REF
-
VREFEXT
Voltage
Reference
V
REF
+
-
POR
DV
DD
Monitoring
SDO
SDI
SCK
Xtal Oscillator
MCLK
OSC1
OSC2
DR
RESET
Digital SPI
Interface
Clock
Generation
Modulator
Output Block
MDAT1
MDAT0
DMCLK
OSR<2:0>
PRE<1:0>
MODOUT<1:0>
CS
+
OFFCAL_CH0
<23:0>
GAINCAL_CH0
<23:0>
X
+
OFFCAL_CH1
<23:0>
GAINCAL_CH1
<23:0>
X
DATA_CH1
<23:0>
SINC
3
+
SINC
1