Datasheet

 2002-2017 Microchip Technology Inc. DS20001732E-page 15
MCP3221
4.5 Differential Non-Linearity (DNL)
In the ideal A/D converter transfer function, each code
has a uniform width. That is, the difference in analog
input voltage is constant from one code transition point
to the next. Differential nonlinearity (DNL) specifies the
deviation of any code in the transfer function from an
ideal code width of 1 LSB. The DNL is determined by
subtracting the locations of successive code transition
points after compensating for any gain and offset
errors. A positive DNL implies that a code is longer than
the ideal code width, whereas a negative DNL implies
that a code is shorter than the ideal width.
4.6 Integral Non-Linearity (INL)
Integral nonlinearity (INL) is a result of cumulative DNL
errors and specifies how much the overall transfer
function deviates from a linear response. The method
of measurement used in the MCP3221 A/D converter
to determine INL is the end-point method.
4.7 Offset Error
Offset error is defined as a deviation of the code transi-
tion points that are present across all output codes.
This has the effect of shifting the entire A/D transfer
function. The offset error is measured by finding the dif-
ference between the actual location of the first code
transition and the desired location of the first transition.
The ideal location of the first code transition is located
at 1/2 LSB above V
SS
.
4.8 Gain Error
Gain error determines the amount of deviation from the
ideal slope of the A/D converter transfer function.
Before the gain error is determined, the offset error is
measured and subtracted from the conversion result.
The gain error can then be determined by finding the
location of the last code transition and comparing that
location to the ideal location. The ideal location of the
last code transition is 1.5 LSBs below full-scale or V
DD
.
4.9 Conversion Current (I
DD
)
Conversion current is the average amount of current
over the time required to perform a 12-bit conversion.
4.10 Active Bus Current (I
DDA
)
The average amount of current over the time required
to monitor the I
2
C bus. Any current that the device con-
sumes while it is not being addressed is referred to as
Active Bus current.
4.11 Standby Current (I
DDS
)
The average amount of current required while no con-
version is occurring and no data is being output (i.e.,
SCL and SDA lines are quiet).
4.12 I
2
C Standard Mode Timing
I
2
C specification where the frequency of SCL is
100 kHz.
4.13 I
2
C Fast Mode Timing
I
2
C specification where the frequency of SCL is
400 kHz.