Datasheet
© 2008 Microchip Technology Inc. DS21298E-page 3
MCP3204/3208
Input Voltage Range for IN- in
pseudo-differential Mode
V
SS
-100 — V
SS
+100 mV
Leakage Current — 0.001 ±1 µA
Switch Resistance — 1000 — Ω See Figure 4-1
Sample Capacitor — 20 — pF See Figure 4-1
Digital Input/Output
Data Coding Format Straight Binary
High Level Input Voltage V
IH
0.7 V
DD
——V
Low Level Input Voltage V
IL
— — 0.3 V
DD
V
High Level Output Voltage V
OH
4.1 — — V I
OH
= -1 mA, V
DD
= 4.5V
Low Level Output Voltage V
OL
—— 0.4 VI
OL
= 1 mA, V
DD
= 4.5V
Input Leakage Current I
LI
-10 — 10 µA V
IN
= V
SS
or V
DD
Output Leakage Current I
LO
-10 — 10 µA V
OUT
= V
SS
or V
DD
Pin Capacitance
(All Inputs/Outputs)
C
IN
,C
OUT
—— 10 pFV
DD
= 5.0V (Note 1)
T
A
= 25°C, f = 1 MHz
Timing Parameters
Clock Frequency f
CLK
—
—
—
—
2.0
1.0
MHz
MHz
V
DD
= 5V (Note 3)
V
DD
= 2.7V (Note 3)
Clock High Time t
HI
250 — — ns
Clock Low Time t
LO
250 — — ns
CS
Fall To First Rising CLK
Edge
t
SUCS
100 — — ns
Data Input Setup Time t
SU
50 — — ns
Data Input Hold Time t
HD
50 — — ns
CLK Fall To Output Data Valid t
DO
— — 200 ns See Figures 1-2 and 1-3
CLK Fall To Output Enable t
EN
— — 200 ns See Figures 1-2 and 1-3
CS
Rise To Output Disable t
DIS
— — 100 ns See Figures 1-2 and 1-3
CS
Disable Time t
CSH
500 — — ns
D
OUT
Rise Time t
R
— — 100 ns See Figures 1-2 and 1-3 (Note 1)
D
OUT
Fall Time t
F
— — 100 ns See Figures 1-2 and 1-3 (Note 1)
Power Requirements
Operating Voltage V
DD
2.7 — 5.5 V
Operating Current I
DD
—
—
320
225
400
—
µA V
DD
=V
REF
= 5V, D
OUT
unloaded
V
DD
=V
REF
= 2.7V, D
OUT
unloaded
Standby Current I
DDS
—0.5 2.0 µACS = V
DD
= 5.0V
ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise noted, all parameters apply at V
DD
= 5V, V
SS
= 0V, V
REF
= 5V,
T
A
= -40°C to +85°C,f
SAMPLE
= 100 ksps and f
CLK
= 20*f
SAMPLE
Parameters Sym Min Typ Max Units Conditions
Note 1: This parameter is established by characterization and not 100% tested.
2: See graphs that relate linearity performance to V
REF
levels.
3: Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity
performance, particularly at elevated temperatures. See Section 6.2 “Maintaining Minimum Clock
Speed”, “Maintaining Minimum Clock Speed”, for more information.