Datasheet

MCP2561/2FD
DS20005284A-page 4  2014 Microchip Technology Inc.
1.5 Permanent Dominant Detection
The MCP2561/2FD device prevents two conditions:
• Permanent Dominant condition on T
XD
• Permanent Dominant condition on the bus
In Normal mode, if the MCP2561/2FD detects an
ex
tended Low state on the T
XD input, it will disable the
CANH and CANL output drivers in order to prevent the
corruption of data on the CAN bus. The drivers will
remain disabled until T
XD goes High.
In Standby mode, if the MCP2561/2FD detects an
ex
tended Dominant condition on the bus, it will set the
R
XD pin to Recessive state. This allows the attached
controller to go to Low-Power mode until the Dominant
issue is corrected. RXD is latched High until a
Recessive state is detected on the bus, and the
wake-up function is enabled again.
Both conditions have a time-out of 1.25 ms (typical).
This
implies a maximum bit time of 69.44 µs
(14.4 kH
z), allowing up to 18 consecutive dominant bits
on t
he bus.
1.6 Power-On Reset (POR) and 
Undervoltage Detection
The MCP2561/2FD has undervoltage detection on
both supply pins: V
DD and VIO. Typical undervoltage
thresholds are 1.2V for V
IO and 4V for VDD.
When the device is powered on, CANH and CANL
rema
in in a high-impedance state until both V
DD and
V
IO exceed their undervoltage levels. Once powered
on, CANH and CANL will enter a high-impedance state
if the voltage level at V
DD drops below the undervoltage
level, providing voltage brown-out protection during
normal operation.
In Normal mode, the receiver output is forced to
Re
cessive state during an undervoltage condition on
VDD. In Standby mode, the low-power receiver is only
enabled when both V
DD and VIO supply voltages rise
above their respective undervoltage thresholds. Once
these threshold voltages are reached, the low-power
receiver is no longer controlled by the POR comparator
and remains operational down to about 2.5V on the
V
DD supply (MCP2561/2FD). The MCP2562FD
transfers data to the R
XD pin down to 1.8V on the VIO
supply.
1.7 Pin Descriptions
Table 1-2 describes the pinout.
TABLE 1-2: MCP2561/2FD PIN DESCRIPTIONS
MCP2561FD
3x3 DFN
MCP2561FD
PDIP, SOIC
MCP2562FD
3x3 DFN
MCP2562FD
PDIP, SOIC
Symbol Pin Function
1 1 1 1 T
XD Transmit Data Input
2 2 2 2 VSS Ground
3 3 3 3 VDD Supply Voltage
4 4 4 4 R
XD Receive Data Output
5 5 — — SPLIT Common Mode Stabilization - MCP2561FD only
— — 5 5 VIO Digital I/O Supply Pin - MCP2562FD only
6 6 6 6 CANL CAN Low-Level Voltage I/O
7 7 7 7 CANH CAN High-Level Voltage I/O
8 8 8 8 STBY Standby Mode Input
9 — 9 — EP Exposed Thermal Pad