Datasheet

MCP2561/2FD
DS20005284A-page 2  2014 Microchip Technology Inc.
Block Diagram
Note 1: There is only one receiver implemented. The receiver can operate in Low-Power or High-Speed mode.
2: Only MCP2561FD has the SPLIT pin.
3: Only MCP2562FD has the V
IO pin. In MCP2561FD, the supply for the digital I/O is internally connected
to V
DD.
V DD
CANH
CANL
T XD
R XD
Driver
and
Slope Control
Thermal
Protection
POR
UVLO
Digital I/O
Supply
V IO
(3)
V SS
STBY
Permanent
Dominant Detect
V IO
V IO
Mode
Control
V DD /2
SPLIT
(2 )
Wake-Up
Filter
CANH
CANL
CANH
CANL
Receiver
LP_RX
(1)
HS_RX