Datasheet

ManualsBrandsMicrochip ManualsCAN Bus DevicesTransceiver CAN 4.5 ... 5.5V SOIC

 2014 Microchip Technology Inc. DS20005284A-page 1

MCP2561/2FD

Features:

• Optimized for CAN FD (Flexible Data rate) at 2, 5

and 8 Mbps Operation

- Maximum Propagation Delay: 120 ns

- Loop Delay Symmetry: -10%/+10% (2 Mbps)

• Implements ISO-11898-2 and ISO-11898-5

tandard Physical Layer Requirements

• Very Low Standby Current (5 µA, typical)

•V

IO Supply Pin to Interface Directly to 

CAN Controllers and Microcontrollers with 

1.8V to 5.5V I/O

• SPLIT Output Pin to Stabilize Common Mode in

ased Split Termination Schemes

• CAN Bus Pins are Disconnected when Device is

Unpowered

- An Unpowered Node or Brown-Out Event will

ot Load the CAN Bus

• Detection of Ground Fault:

- Permanent Dominant Detection on T

- Permanent Dominant Detection on Bus

• Power-on Reset and Voltage Brown-Out

rotection on V

DD Pin

• Protection Against Damage Due to Short-Circuit

onditions (Positive or Negative Battery Voltage)

• Protection Against High-Voltage Transients in

tomotive Environments

• Automatic Thermal Shutdown Protection

• Suitable for 12V and 24V Systems

• Meets or exceeds stringent automotive design

quirements including “Hardware Requirements

for LIN, CAN and FlexRay Interfaces in

Automotive Applications”, Version 1.3, May 2012

- Radiated emissions @ 2 Mbps with Common

Mode Choke (CMC)

-DPI @ 2 Mbps with CMC

• High ESD Protection on CANH and CANL,

eting IEC61000-4-2 up to ±14 kV

• Available in PDIP-8L, SOIC-8L and 3x3 DFN-8L

• Temperature ranges:

- Extended (E): -40°C to +125°C

- High (H): -40°C to +150°C

Description:

The MCP2561/2FD is a second generation high-speed

CAN transceiver from Microchip Technology Inc. It

offers the same features as the MCP2561/2.

Additionally, it guarantees Loop Delay Symmetry in

order to support the higher data rates required for CAN

FD. The maximum propagation delay was improved to

support longer bus length.

The device meets the automotive requirements for

AN FD bit rates exceeding 2 Mbps, low quiescent

current, electromagnetic compatibility (EMC) and

electrostatic discharge (ESD).

Package Types

MCP2561/2FD Family Members

MCP2562FD

PDIP, SOIC

VDD

VSS

RXD

CANH

CANL

VIO

STBYTXD

MCP2561FD

PDIP, SOIC

VDD

VSS

RXD

CANH

CANL

SPLIT

STBYT

MCP2561FD

3x3 DFN*

VDD

VSS

RXD

CANH

CANL

SPLIT

STBYT

MCP2562FD

3x3 DFN*

VDD

VSS

RXD

CANH

CANL

VIO

STBYTXD

* Includes Exposed Thermal Pad (EP); see Table 1-2

Device Feature Description

MCP2561FD SPLIT pin Common mode stabilization

MCP2562FD V

IO pin Internal level shifter on digital I/O pins

Note: For ordering information, see the “Product Identification System” section on page 29.

High-Speed CAN Flexible Data Rate Transceiver

Summary of content (32 pages)

PAGE 1
MCP2561/2FD High-Speed CAN Flexible Data Rate Transceiver Features: Description: • Optimized for CAN FD (Flexible Data rate) at 2, 5 and 8 Mbps Operation - Maximum Propagation Delay: 120 ns - Loop Delay Symmetry: -10%/+10% (2 Mbps) • Implements ISO-11898-2 and ISO-11898-5 Standard Physical Layer Requirements • Very Low Standby Current (5 µA, typical) • VIO Supply Pin to Interface Directly to  CAN Controllers and Microcontrollers with  1.8V to 5.
PAGE 2
MCP2561/2FD Block Diagram SPLIT(2) VDD/2 VIO(3) VDD Digital I/O Supply Thermal Protection POR UVLO VIO Permanent Dominant Detect TXD STBY CANH Driver and Slope Control VIO CANL Mode Control Wake-Up Filter CANH LP_RX(1) CANL Receiver RXD CANH HS_RX CANL VSS Note 1: There is only one receiver implemented. The receiver can operate in Low-Power or High-Speed mode. 2: Only MCP2561FD has the SPLIT pin. 3: Only MCP2562FD has the VIO pin.
PAGE 3
MCP2561/2FD 1.0 DEVICE OVERVIEW 1.1.1 The MCP2561/2FD is a high-speed CAN device, fault-tolerant device that serves as the interface between a CAN protocol controller and the physical bus. The MCP2561/2FD device provides differential transmit and receive capability for the CAN protocol controller, and is fully compatible with the ISO-11898-2 and ISO-11898-5 standards. The Loop Delay Symmetry is guaranteed to support data rates that are up to 5 Mbps for CAN FD (Flexible Data rate).
PAGE 4
MCP2561/2FD 1.5 Permanent Dominant Detection 1.6 The MCP2561/2FD device prevents two conditions: • Permanent Dominant condition on TXD • Permanent Dominant condition on the bus In Normal mode, if the MCP2561/2FD detects an extended Low state on the TXD input, it will disable the CANH and CANL output drivers in order to prevent the corruption of data on the CAN bus. The drivers will remain disabled until TXD goes High.
PAGE 5
MCP2561/2FD 1.7.1 TRANSMITTER DATA  INPUT PIN (TXD) The CAN transceiver drives the differential output pins CANH and CANL according to TXD. It is usually connected to the transmitter data output of the CAN controller device. When TXD is Low, CANH and CANL are in the Dominant state. When TXD is High, CANH and CANL are in the Recessive state, provided that another CAN node is not driving the CAN bus with a Dominant state.
PAGE 6
MCP2561/2FD 1.8 Typical Applications In order to meet the EMC/EMI requirements, a Common Mode Choke (CMC) might be required for data rates greater than 1 Mbps. FIGURE 1-1: VBAT MCP2561FD WITH SPLIT PIN 5V LDO 0.1 μF PIC® MCU CANRX RBX VDD MCP2561FD VDD CANTX TXD RXD STBY CANH CANH SPLIT 300 Optional(1) VSS CANL VSS 60 4700 pF 60 CANL Note 1: Optional resistor to allow communication during bus failure (CANL shorted to ground). VBAT MCP2562FD WITH VIO PIN 5V LDO 1.8V LDO 0.
PAGE 7
MCP2561/2FD 2.0 ELECTRICAL CHARACTERISTICS 2.1 Terms and Definitions A number of terms are defined in ISO-11898 that are used to describe the electrical characteristics of a CAN transceiver device. These terms and definitions are summarized in this section. 2.1.1 BUS VOLTAGE VCANL and VCANH denote the voltages of the bus line wires CANL and CANH relative to ground of each individual CAN node. 2.1.
PAGE 8
MCP2561/2FD 2.2 Absolute Maximum Ratings† VDD .............................................................................................................................................................................7.0V VIO ..............................................................................................................................................................................7.0V DC Voltage at TXD, RXD, STBY and VSS ..................................................................
PAGE 9
MCP2561/2FD 2.3 DC Characteristics Electrical Characteristics: Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;  VDD = 4.5V to 5.5V, VIO = 1.8V to 5.5V (Note 2), RL = 60, CL = 100 pF; unless otherwise specified. Characteristic Sym Min Typ Max Units Conditions Voltage Range VDD 4.5 — 5.5 Supply Current IDD — 5 10 — 45 70 IDDS — 5 15 — 5 15 High Level of the POR  Comparator VPORH 3.8 — 4.3 V Low Level of the POR  Comparator VPORL 3.4 — 4.
PAGE 10
MCP2561/2FD 2.3 DC Characteristics (Continued) Electrical Characteristics: Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;  VDD = 4.5V to 5.5V, VIO = 1.8V to 5.5V (Note 2), RL = 60, CL = 100 pF; unless otherwise specified.
PAGE 11
MCP2561/2FD 2.3 DC Characteristics (Continued) Electrical Characteristics: Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;  VDD = 4.5V to 5.5V, VIO = 1.8V to 5.5V (Note 2), RL = 60, CL = 100 pF; unless otherwise specified. Characteristic Sym Min Typ Max Units Conditions 0.5VDD 0.7VDD V Normal mode;  ISPLIT = -500 µA to +500 µA 0.45VDD 0.5VDD 0.
PAGE 12
MCP2561/2FD FIGURE 2-2: PHYSICAL BIT REPRESENTATION AND SIMPLIFIED BIAS IMPLEMENTATION CANH, CANL, SPLIT Normal Mode Standby Mode CANH SPLIT SPLIT floating CANL Recessive Dominant Recessive Time VDD CANH VDD/2 Normal RXD Standby Mode CANL DS20005284A-page 12  2014 Microchip Technology Inc.
PAGE 13
MCP2561/2FD 2.4 AC Characteristics Electrical Characteristics: Extended (E): TAMB = -40°C to +125°C and High (H): TAMB = -40°C to +150°C;  VDD = 4.5V to 5.5V, VIO = 1.8V to 5.5V (Note 2), RL = 60CL = 100 pF; unless otherwise specified. Param. No. Sym 1 tBIT 2 fBIT Characteristic Min Typ Max Units Bit Time 0.2 — 69.44 µs Bit Frequency 14.
PAGE 14
MCP2561/2FD FIGURE 2-4: TEST CIRCUIT FOR ELECTRICAL CHARACTERISTICS 0.1 µF VDD CANH TXD SPLIT CAN Transceiver RL CL RXD 15 pF CANL STBY GND Note: On MCP2562FD, VIO is connected to VDD. FIGURE 2-5: TEST CIRCUIT FOR AUTOMOTIVE TRANSIENTS CANH TXD SPLIT CAN Transceiver 500 pF RL Transient Generator RXD CANL GND STBY 500 pF Note 1: On MCP2562FD, VIO is connected to VDD. 2: The wave forms of the applied transients shall be in accordance with ISO-7637, Part 1, test pulses 1, 2, 3a and 3b.
PAGE 15
MCP2561/2FD 2.5 Timing Diagrams and Specifications FIGURE 2-7: TIMING DIAGRAM FOR AC CHARACTERISTICS VDD TXD (transmit data input voltage) 0V VDIFF (CANH, CANL differential voltage) RXD (receive data output voltage) 3 5 6 4 7 7 FIGURE 2-8: TIMING DIAGRAM FOR WAKEUP FROM STANDBY VSTBY Input Voltage VDD 0V VDD/2 VCANH/VCANL 0 VTXD = VDD FIGURE 2-9: 10 PERMANENT DOMINANT TIMER RESET DETECT Minimum pulse width until CAN bus goes to Dominant state after the falling edge.
PAGE 16
MCP2561/2FD FIGURE 2-10: TIMING DIAGRAM FOR LOOP DELAY SYMMETRY TXD 5*tBIT(TXD) tBIT(TXD) RXD 8 tBIT(RXD) Note: 2.6 The bit time of a recessive bit after five dominant bits is measured on the RXD pin. Due to asymmetry of the loop delay, and the CAN transceiver not being a push pull driver, the recessive bits tend to shorten.
PAGE 17
MCP2561/2FD 3.0 PACKAGING INFORMATION 3.
PAGE 18
MCP2561/2FD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20005284A-page 18  2014 Microchip Technology Inc.
PAGE 19
MCP2561/2FD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2014 Microchip Technology Inc.
PAGE 20
MCP2561/2FD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20005284A-page 20  2014 Microchip Technology Inc.
PAGE 21
MCP2561/2FD 8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D A N B E1 NOTE 1 1 2 TOP VIEW E C A2 A PLANE L c A1 e eB 8X b1 8X b .010 C SIDE VIEW END VIEW Microchip Technology Drawing No. C04-018D Sheet 1 of 2  2014 Microchip Technology Inc.
PAGE 22
MCP2561/2FD 8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.
PAGE 23
MCP2561/2FD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging  2014 Microchip Technology Inc.
PAGE 24
MCP2561/2FD Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS20005284A-page 24  2014 Microchip Technology Inc.
PAGE 25
MCP2561/2FD & ! " #$% ! " # $ % & "' " " ( $ ) % *++&&& ! !+ $  2014 Microchip Technology Inc.
PAGE 26
MCP2561/2FD NOTES: DS20005284A-page 26  2014 Microchip Technology Inc.
PAGE 27
MCP2561/2FD APPENDIX A: REVISION HISTORY Revision A (March 2014) Original Release of this Document.  2014 Microchip Technology Inc.
PAGE 28
MCP2561/2FD NOTES: DS20005284A-page 28  2014 Microchip Technology Inc.
PAGE 29
MCP2561/2FD PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact the factory or one of the sales offices listed on the back page. PART NO.
PAGE 30
MCP2561/2FD NOTES: DS20005284A-page 30  2014 Microchip Technology Inc.
PAGE 31
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
PAGE 32
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