Datasheet

2013-2014 Microchip Technology Inc. DS20005167C-page 3
MCP2561/2
1.0 DEVICE OVERVIEW
The MCP2561/2 is a high-speed CAN, fault-tolerant
device that serves as the interface between a CAN
protocol controller and the physical bus. The
MCP2561/2 device provides differential transmit and
receive capability for the CAN protocol controller, and
is fully compatible with the ISO-11898-2 and
ISO-11898-5 standards. It will operate at speeds of up
to 1
Mb/s.
Typically, each node in a CAN system must have a
device to convert the digital signals generated by a
CAN controller to signals suitable for transmission over
the bus cabling (differential output). It also provides a
buffer between the CAN controller and the high-voltage
spikes that can be generated on the CAN bus by
outside sources.
1.1 Mode Control Block
The MCP2561/2 supports two modes of operation:
•Normal
Standby
These modes are summarized in Table 1-1.
1.1.1 NORMAL MODE
Normal mode is selected by applying a low-level to the
STBY pin. The driver block is operational and can drive
the bus pins. The slopes of the output signals on CANH
and CANL are optimized to produce minimal
electromagnetic emissions (EME).
The high-speed differential receiver is active.
1.1.2 STANDBY MODE
The device may be placed in Standby mode by
applying a high-level to the STBY pin. In Standby
mode, the transmitter and the high-speed part of the
receiver are switched off to minimize power
consumption. The low-power receiver and the wake-up
filter blocks are enabled in order to monitor the bus for
activity. The receive pin (R
XD) will show a delayed
representation of the CAN bus, due to the wake-up
filter.
The CAN controller gets interrupted by a negative edge
on the R
XD pin (dominant state on the CAN bus). The
CAN controller must put the MCP2561/2 back into
Normal mode using the STBY pin, in order to enable
high-speed data communication.
The CAN bus wake-up function requires both supply
voltages, V
DD and VIO, to be in valid range.
1.2 Transmitter Function
The CAN bus has two states: Dominant and
Recessive. A Dominant state occurs when the
differential voltage between CANH and CANL is
greater than V
DIFF(D)(I). A Recessive state occurs
when the differential voltage is less than V
DIFF(R)(I).
The Dominant and Recessive states correspond to the
Low and High state of the T
XD input pin, respectively.
However, a Dominant state initiated by another CAN
node will override a Recessive state on the CAN bus.
1.3 Receiver Function
In Normal mode, the RXD output pin reflects the differ-
ential bus voltage between CANH and CANL. The Low
and High states of the R
XD output pin correspond to the
Dominant and Recessive states of the CAN bus,
respectively.
1.4 Internal Protection
CANH and CANL are protected against battery short-
circuits and electrical transients that can occur on the
CAN bus. This feature prevents destruction of the
transmitter output stage during such a Fault condition.
The device is further protected from excessive current
loading by thermal shutdown circuitry that disables the
output drivers when the junction temperature exceeds
a nominal limit of +175°C. All other parts of the chip
remain operational, and the chip temperature is low
-
ered due to the decreased power dissipation in the
transmitter outputs. This protection is essential to
protect against bus line short-circuit-induced damage.
TABLE 1-1: MODES OF OPERATION
Mode STBY Pin
RXD Pin
LOW HIGH
Normal LOW Bus is dominant Bus is recessive
Standby HIGH Wake-up request is detected No wake-up request detected