Datasheet
MCP2561/2
DS20005167C-page 2 2013-2014 Microchip Technology Inc.
Block Diagram
Note 1: There is only one receiver implemented. The receiver can operate in Low-Power or High-Speed mode.
2: Only MCP2561 has the SPLIT pin.
3: Only MCP2562 has the V
IO pin. In MCP2561, the supply for the digital I/O is internally connected to VDD.
VDD
CANH
CANL
T
XD
RXD
Driver
and
Slope Control
Thermal
Protection
POR
UVLO
Digital I/O
Supply
VIO
(3)
VSS
STBY
Permanent
Dominant Detect
VIO
VIO
Mode
Control
VDD/2
SPLIT
(2 )
Wake-Up
Filter
CANH
CANL
CANH
CANL
Receiver
LP_RX
(1)
HS_RX