Datasheet

 2014 Microchip Technology Inc. DS20005284A-page 15
MCP2561/2FD
2.5 Timing Diagrams and Specifications
FIGURE 2-7: TIMING DIAGRAM FOR AC CHARACTERISTICS
FIGURE 2-8: TIMING DIAGRAM FOR W
AKEUP FROM STANDBY
FIGURE 2-9: PERMANENT DOMINANT TIMER RESET DETECT
3
7
4
7
0V
V
DD
TXD (transmit data
input voltage)
VDIFF (CANH,
CANL differential
voltage)
R
XD (receive data
output voltage)
5
6
VTXD = VDD
10
0V
V
DD
VSTBY
VCANH/VCANL
Input Voltage
0
V
DD/2
11
12
TXD
VDIFF (VCANH-VCANL)
Driver is off
Minimum pulse width until CAN bus goes to Dominant state after the falling edge.