Datasheet

 2003-2019 Microchip Technology Inc. DS20001801J-page 45
MCP2515
REGISTER 5-3: CNF3: CONFIGURATION REGISTER 3 (ADDRESS: 28h)
R/W-0 R/W-0 U-0 U-0 U-0 R/W-0 R/W-0 R/W-0
SOF WAKFIL
— — — PHSEG2[2:0]
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 SOF: Start-of-Frame signal bit
If CLKEN (CANCTRL[2]) = 1:
1 = CLKOUT pin is enabled for SOF signal
0 = CLKOUT pin is enabled for clock out function
If CLKEN (CANCTRL[2]) = 0:
Bit is don’t care.
bit 6 WAKFIL: Wake-up Filter bit
1 = Wake-up filter is enabled
0 = Wake-up filter is disabled
bit 5-3 Unimplemented: Reads as ‘0’
bit 2-0 PHSEG2[2:0]: PS2 Length bits
(PHSEG2[2:0] + 1) x T
Q
. Minimum valid setting for PS2 is 2 T
Q
s.