Datasheet

 2003-2019 Microchip Technology Inc. DS20001801J-page 23
MCP2515
4.0 MESSAGE RECEPTION
4.1 Receive Message Buffering
The MCP2515 includes two full receive buffers with
multiple acceptance filters for each. There is also a
separate Message Assembly Buffer (MAB) that acts as
a third receive buffer (see Figure 4-2).
4.1.1 MESSAGE ASSEMBLY BUFFER
Of the three receive buffers, the MAB is always
committed to receiving the next message from the bus.
The MAB assembles all messages received. These
messages will be transferred to the RXBn buffers (see
Register 4-4 to Register 4-9) only if the acceptance
filter criteria is met.
4.1.2 RXB0 AND RXB1
The remaining two receive buffers, called RXB0 and
RXB1, can receive a complete message from the
protocol engine via the MAB. The MCU can access one
buffer, while the other buffer is available for message
reception, or for holding a previously received
message.
4.1.3 RECEIVE FLAGS/INTERRUPTS
When a message is moved into either of the receive
buffers, the appropriate RXnIF bit (CANINTF) is set.
This bit must be cleared by the MCU in order to allow a
new message to be received into the buffer. This bit
provides a positive lockout to ensure that the MCU has
finished with the message before the MCP2515
attempts to load a new message into the receive buffer.
If the RXnIE bit (CANINTE) is set, an interrupt will be
generated on the
INT pin to indicate that a valid
message has been received. In addition, the associ-
ated
RXnBF pin will drive low if configured as a receive
buffer full pin. See Section 4.4 “RX0BF and RX1BF
Pins” for details.
4.2 Receive Priority
RXB0, the higher priority buffer, has one mask and two
message acceptance filters associated with it. The
received message is applied to the mask and filters for
RXB0 first.
RXB1 is the lower priority buffer, with one mask and
four acceptance filters associated with it.
In addition to the message being applied to the RXB0
mask and filters first, the lower number of acceptance
filters makes the match on RXB0 more restrictive and
implies a higher priority for that buffer.
When a message is received, the RXBnCTRL[3:0] reg-
ister bits will indicate the acceptance filter number that
enabled reception and whether the received message
is a Remote Transfer Request.
4.2.1 ROLLOVER
Additionally, the RXB0CTRL register can be configured
such that, if RXB0 contains a valid message and
another valid message is received, an overflow error
will not occur and the new message will be moved into
RXB1, regardless of the acceptance criteria of RXB1.
4.2.2 RXM BITS
The RXM[1:0] bits (RXBnCTRL[6:5]) set special
Receive modes. Normally, these bits are cleared to ‘00’
to enable reception of all valid messages as deter-
mined by the appropriate acceptance filters. In this
case, the determination of whether or not to receive
standard or extended messages is determined by the
EXIDE bit (RFXnSIDL[3]) in the Filter n Standard Iden-
tifier Low register.
If the RXM[1:0] bits are set to ‘11’, the buffer will receive
all messages, regardless of the values of the accep-
tance filters. Also, if a message has an error before the
EOF, that portion of the message assembled in the
MAB, before the error frame, will be loaded into the buf-
fer. This mode has some value in debugging a CAN
system and would not be used in an actual system
environment.
Setting the RXM[1:0] bits to ‘01’ or ‘10’ is not
recommended.
Note: The entire content of the MAB is moved
into the receive buffer once a message is
accepted. This means, that regardless of
the type of identifier (Standard or
Extended) and the number of data bytes
received, the entire receive buffer is
overwritten with the MAB contents.
Therefore, the contents of all registers in
the buffer must be assumed to have been
modified when any message is received.