Datasheet
2003-2019 Microchip Technology Inc. DS20001801J-page 19
MCP2515
REGISTER 3-2: TXRTSCTRL: TXnRTS PIN CONTROL AND STATUS REGISTER
(ADDRESS: 0Dh)
U-0 U-0 R-x R-x R-x R/W-0 R/W-0 R/W-0
— — B2RTS B1RTS B0RTS B2RTSM B1RTSM B0RTSM
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7-6 Unimplemented: Read as ‘0’
bit 5 B2RTS:
TX2RTS Pin State bit
- Reads state of
TX2RTS pin when in Digital Input mode
- Reads as ‘0’ when pin is in Request-to-Send mode
bit 4 B1RTS:
TX1RTS Pin State bit
- Reads state of
TX1RTS pin when in Digital Input mode
- Reads as ‘0’ when pin is in Request-to-Send mode
bit 3 B0RTS:
TX0RTS Pin State bit
- Reads state of
TX0RTS pin when in Digital Input mode
- Reads as ‘0’ when pin is in Request-to-Send mode
bit 2 B2RTSM:
TX2RTS Pin mode bit
1 = Pin is used to request message transmission of TXB2 buffer (on falling edge)
0 = Digital input
bit 1 B1RTSM:
TX1RTS Pin mode bit
1 = Pin is used to request message transmission of TXB1 buffer (on falling edge)
0 = Digital input
bit 0 B0RTSM:
TX0RTS Pin mode bit
1 = Pin is used to request message transmission of TXB0 buffer (on falling edge)
0 = Digital input