Datasheet

MCP2515
DS20001801J-page 50  2003-2019 Microchip Technology Inc.
REGISTER 6-3: EFLG: ERROR FLAG REGISTER (ADDRESS: 2Dh)
R/W-0 R/W-0 R-0 R-0 R-0 R-0 R-0 R-0
RX1OVR RX0OVR TXBO TXEP RXEP TXWAR RXWAR EWARN
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 7 RX1OVR: Receive Buffer 1 Overflow Flag bit
- Sets when a valid message is received for RXB1 and RX1IF (CANINTF[1]) = 1
- Must be reset by MCU
bit 6 RX0OVR: Receive Buffer 0 Overflow Flag bit
- Sets when a valid message is received for RXB0 and RX0IF (CANINTF[0]) = 1
- Must be reset by MCU
bit 5 TXBO: Bus-Off Error Flag bit
- Sets when TEC reaches 255
- Resets after a successful bus recovery sequence
bit 4 TXEP: Transmit Error-Passive Flag bit
- Sets when TEC is equal to or greater than 128
- Resets when TEC is less than 128
bit 3 RXEP: Receive Error-Passive Flag bit
- Sets when REC is equal to or greater than 128
- Resets when REC is less than 128
bit 2 TXWAR: Transmit Error Warning Flag bit
- Sets when TEC is equal to or greater than 96
- Resets when TEC is less than 96
bit 1 RXWAR: Receive Error Warning Flag bit
- Sets when REC is equal to or greater than 96
- Resets when REC is less than 96
bit 0 EWARN: Error Warning Flag bit
- Sets when TEC or REC is equal to or greater than 96 (TXWAR or RXWAR = 1)
- Resets when both REC and TEC are less than 96