Datasheet

 2005-2016 Microchip Technology Inc. DS20001952C-page 25
MCP23017/MCP23S17
3.6.4 INTERRUPT OPERATION
The INTn interrupt output can be configured as
active-low, active-high or open-drain via the IOCON
register.
Only those pins that are configured as an input (IODIR
register) with Interrupt-On-Change (IOC) enabled
(IOINTEN register) can cause an interrupt. Pins
defined as an output have no effect on the interrupt
output pin.
Input change activity on a port input pin that is enabled
for IOC generates an internal device interrupt and the
device captures the value of the port and copies it into
INTCAP. The interrupt remains active until the INTCAP
or GPIO register is read. Writing to these registers does
not affect the interrupt. The interrupt condition is
cleared after the LSb of the data is clocked out during
a read command of GPIO or INTCAP.
The first interrupt event causes the port contents to be
copied into the INTCAP register. Subsequent interrupt
conditions on the port will not cause an interrupt to
occur as long as the interrupt is not cleared by a read
of INTCAP or GPIO.
3.6.5 INTERRUPT CONDITIONS
There are two possible configurations that cause
interrupts (configured via INTCON):
1. Pins configured for interrupt-on-pin change
will cause an interrupt to occur if a pin changes
to the opposite state. The default state is reset
after an interrupt occurs and after clearing the
interrupt condition (i.e., after reading GPIO or
INTCAP). For example, an interrupt occurs by
an input changing from ‘1’ to ‘0’. The new initial
state for the pin is a logic ‘0’ after the interrupt is
cleared.
2. Pins configured for interrupt-on-change from
register value will cause an interrupt to occur if
the corresponding input pin differs from the
register bit. The interrupt condition will remain as
long as the condition exists, regardless if the
INTCAP or GPIO is read.
See Figures 3-8 and 3-9 for more information on
interrupt operations.
FIGURE 3-8: INTERRUPT-ON-PIN
CHANGE
FIGURE 3-9: INTERRUPT-ON-CHANGE
FROM REGISTER
DEFAULT
Note: The value in INTCAP can be lost if GPIO
is read before INTCAP while another IOC
is pending. After reading GPIO, the
interrupt will clear and then set due to the
pending IOC, causing the INTCAP
register to update.
GPx
INT ACTIVE ACTIVE
Port value
is captured
into INTCAP
Read GPIO
or INTCAP
Port value
is captured
into INTCAP
INT
Port value
is captured
into INTCAP
Read GPIO
or INTCAP
DEFVAL REGISTER
X X X X X 0 X X
GP2
76543210 GPx<7:0>
ACTIVE
ACTIVE
(INT clears only if interrupt
condition does not exist.)
Pin
Pin