Datasheet

2014 Microchip Technology Inc. DS20005292A-page 5
MCP2221
1.4 Device Configuration
The MCP2221 keeps all the essential device
configuration settings stored in Flash memory.
Device configuration settings affect the way the
MCP2221 behaves at runtime.
The settings are stored into the Flash memory on the
device. Some of the settings are also copied into
SRAM at Power-up/Reset.
These device configuration settings reside in following
two distinct areas of Flash memory:
Chip Settings
The Chip Settings area stores the key MCP2221
parameters – USB parameters, ADC/DAC refer-
ence voltage choice, start-up DAC value, Clock
Reference output (CLKR) frequency, and duty
cycle values.
GP Settings
The GP Settings area stores the GP designation
settings. For GP settings that are assigned to
GPIO output operation, output values (logic 1 or 0)
are also specified.
Even though the MCP2221 places a partial copy of the
Chip Settings in SRAM, the following Chip Settings
always reside in Flash:
USB Manufacturer/Product and Serial Number
descriptors
USB VID and PID pair
USB options (e.g., the requested amount of
current that is presented to the USB host during
the USB enumeration process)
1.4.1 POWER-UP/RESET DEVICE
CONFIGURATION BEHAVIOR
At Power-up/Reset, the MCP2221 configures the
device options (GP designation, special function pins
parameters, and USB enumeration options) according
to the Flash settings. Then, the Flash Chip Settings and
GP Settings are loaded into SRAM to allow for their
temporary modification at runtime.
Chip Settings of the Device Configuration Flash is cop-
ied partially into SRAM. Only the runtime-modifiable
parameters are copied into SRAM.
GP Settings of the Device Configuration Flash (GP set-
tings area) are copied entirely into the SRAM. By copy-
ing the GP settings completely into SRAM, the user is
allowed to completely change the GP designation at
runtime.
The SRAM copy of the settings can be altered at
runtime in order to change certain device behavior,
e.g., GP designation (the GPs can be re-assigned for a
different type of operation than the one assigned at
Power-up), and special parameters (DAC value,
ADC/DAC voltage references, Clock output value).
FIGURE 1-1: CHIP SETTINGS RUNTIME
MANAGEMENT
The SRAM settings (GP and partial Chip Settings) can
be modified through USB HID commands and they will
have an effect on the following device features:
GP pin designation (switch between GPIO, dedi-
cated or special functions modes)
GPIO direction and output value (only for GPIO
outputs) – for the GPs assigned to work in GPIO
mode
Clock Output duty cycle and value – if GP1 is
assigned for CLKR mode (Clock Reference
output mode), by modifying the SRAM settings,
the clock frequency and duty cycle can be
changed at runtime
DAC value and voltage reference used – the DAC
value setting as well as the voltage reference
used for it are stored in SRAM settings and they
can be changed at runtime. Through this
mechanism, the user can change at runtime the
DAC value and the voltage reference as well.
ADC voltage reference value – the voltage
reference used for ADC conversions can be
changed by altering its corresponding SRAM
setting
Interrupt-On-Change detector settings – if GP1 is
assigned for IOC (Interrupt-On-Change) mode,
the SRAM settings are used for setting up the
triggers used for external interrupt detection
(positive, negative edge detection or both)
Copy FLASH Chip
and
GP settings to SRAM
USB enumeration
& configuration
complete
Change the
SRAM settings
Power-up/Reset
changes needed
No Yes
SRAM settings