Datasheet

 2014 Microchip Technology Inc. DS20005292A-page 21
MCP2221
1.9 CLKR
When GP1 is configured for clock output operation, the
GP1 pin will act as a digital output, providing a clock
signal derived from the device’s internal clock. The
clock’s nominal frequency is 12 MHz ±0.25%. Other
clock values and duty cycles are possible by setting
different values that are associated with this mode of
operation.
1.10 IOC
When GP1 is configured for Interrupt-on-Change (IOC)
operation, GP1 acts as a digital input that is sensitive to
positive and negative edges. Depending on the set-
tings associated with this mode of operation, the GP1
can detect positive, negative, or both, edges.
1.11 RESET/POR
1.11.1 RESET PIN
The RST pin provides a method for triggering an
external Reset of the device. A Reset is generated by
holding the pin low. These devices have a noise filter in
the Reset path which detects and ignores small pulses.
1.11.2 POR
A Power-on Reset (POR) pulse is generated on-chip
whenever V
DD rises above a certain threshold. This
allows the device to start in the initialized state when
VDD is adequate for operation.
To take advantage of the POR circuitry, tie the RST
pin
through a resistor (1-10 k) to V
DD. This will eliminate
external RC components usually needed to create a
POR delay.
When the device starts normal operation (i.e., exits the
Reset condition), device operating parameters (volt-
age, frequency, temperature, etc.) must be met to
ensure operation. If these conditions are not achieved,
the device must be held in Reset until the operating
conditions are met.
1.12 Internal Oscillator
The MCP2221 features an internal oscillator that pro-
vides a 12 MHz clock, which is needed for the USB
modules (HID and CDC).
Full-speed USB is nominally 12 Mb/s. The clock
signal’s accuracy is over temp (2,500 ppm maximum).
The internal clock of the MCP2221 is fed into the CLKR
module to provide a clock signal outside of the device.
GP1 can be configured as a clock output pin providing
a 12 MHz clock to the rest of the system. Other clock
and duty-cycle values are possible by using different
settings for this module.
1.13 I
2
C™ Master Module
The I
2
C Master module is responsible for the I
2
C traffic
generation. The module is controlled through the USB
HID, through the Bus Matrix module.
The I
2
C module only implements the functionality of an
I
2
C/SMBus Master.
1.13.1 I
2
C/SMBUS MASTER
The I
2
C Master initiates all the I
2
C/SMBus transactions
(being read or write operations) on the bus.
The I
2
C/SMBus Master module has the following
capabilities:
• sending/receiving data at a multitude of bit rates,
up to 400 kbps
• 7-bit Addressing mode
• single data transfers of up to 65,535 bytes
• clock-stretching (it allows the slower I
2
C Slaves to
communicate)
All the user data to be sent/transmitted over the I
2
C bus
is conveyed to the USB host only through the USB HID
interface.
1.14 Bus Matrix Module
The Bus Matrix module manages the communication
between various functional modules, such as: USB
(HID and CDC), I
2
C, UART, GPIO/ADC/DAC, Config,
IOC, CLKR, Pin Mux.
1.15 Config Module
The Config module is in charge of the storage of the
device settings and also of their management (load-
ing/modifying/access protection). The module uses
non-volatile memory for storing the Power-up device
settings.
At Power-up, the module loads the settings from the
non-volatile storage area into an SRAM location
(volatile settings). These settings represent the
device’s configuration, along with other key parameters
(e.g., string descriptors, VID/PID, etc.). After the
settings are loaded in SRAM (volatile settings), they
can be changed through the USB HID interface.
The user can read/modify/change either settings (non-
volatile or volatile) through the same interface (USB
HID).
The Config module contains the relevant Power-up
settings that are used by the MCP2221. A few
examples of settings are: USB descriptors, GP
settings, ADC, DAC, CLKR.