Datasheet

 2010 Microchip Technology Inc. DS22230A-page 9
MCP2003/4
TABLE 1-2: FAULT/TXE TRUTH TABLE
1.5.5 TRANSMIT DATA INPUT (T
XD)
The Transmit Data Input pin has an internal pull-up.
The LIN pin is low (dominant) when T
XD is low, and high
(recessive) when T
XD is high.
For extra bus security, T
XD is internally forced to ‘1’
whenever the transmitter is disabled regardless of
external T
XD voltage.
1.5.5.1 TXD Dominant Timeout
If TXD is driven low longer than approximately 10 ms,
the LBUS pin is switched to Recessive mode and the
part enters TOFF mode. This is to prevent the LIN node
from permanently driving the LIN Bus dominant. The
transmitter is re-enabled on the TXD rising edge.
1.5.6 GROUND (VSS)
This is the Ground pin.
1.5.7 LIN BUS (LBUS)
The bidirectional LIN Bus pin (LBUS) is controlled by the
T
XD input. LBUS has a current limited open collector
output. To reduce EMI, the edges during the signal
changes are slope controlled and include corner
rounding control for both falling and rising edges.
The internal LIN receiver observes the activities on the
LIN bus, and matches the output signal R
XD to follow
the state of the L
BUS pin.
1.5.7.1 Bus Dominant Timer
The Bus Dominant Timer is an internal timer that deac-
tivates the L
BUS transmitter after approximately
25 milliseconds of dominant state on the L
BUS pin. The
timer is reset on any recessive L
BUS state.
The LIN bus transmitter will be re-enabled after a
recessive state on the L
BUS pin as long as CS is high.
Disabling can be caused by the LIN bus being exter-
nally held dominant, or by TXD being driven low. Addi-
tionally, on the MCP2004, the FAULT
pin will be driven
low to indicate the Transmitter Off state.
1.5.8 BATTERY (VBB)
This is the Battery Positive Supply Voltage pin.
1.5.9 VOLTAGE REGULATOR ENABLE
OUTPUT (V
REN)
This is the External Voltage Regulator Enable pin.
Open source output is pulled high to V
BB in all modes,
except Power Down.
1.5.10 EXPOSED THERMAL PAD (EP)
Do not electrically connect, or connect to Vss.
T
XD
In
RXD
Out
LINBUS
I/O
Thermal
Override
FAULT/TXE
Definition
External
Input
Driven
Output
LHV
BB OFF H L FAULT, TXD driven low, LINBUS shorted to VBB
(Note 1)
HHVBB OFF H H OK
L L GND OFF H H OK
H L GND OFF H H OK, data is being received from the LIN
BUS
xxVBB ON H L FAULT, Transceiver in thermal shutdown
xxV
BB x L x NO FAULT, the CPU is commanding the
transceiver to turn off the transmitter driver
Legend: x = don’t care
Note 1: The FAULT/TXE is valid after approximately 25 µs after TXD falling edge. This is to eliminate false fault
reporting during bus propagation delays.