Datasheet

 2010 Microchip Technology Inc. DS22230A-page 17
MCP2003/4
2.6 Timing Diagrams and Specifications
FIGURE 2-4: BUS TIMING DIAGRAM
FIGURE 2-5: CS TO V
REN TIMING DIAGRAM
FIGURE 2-6: BUS TO V
REN WAKE TIMING DIAGRAM
.95VLBUS
0.5VLBUS
TTRANSPDR
TRECPDR
TTRANSPDF
TRECPDF
TXD
LBUS
RXD
Internal TXD/RXD
Compare
FAULT Sampling
TFAULT
TFAULT
FAULT/TXE Output
Stable
Stable
Stable
Match
Match
Match
Match
Match
Hold
Value
Hold
Value
50%
50%
.50VBB
50%
50%
0.0V
TCSPD
TCSOR
CS
V
REN
VBB
OFF
VREN
LBUS
.4VBB
VBB
TBDB + TBACTVE