Datasheet

MCP16331
DS20005308B-page 14  2014 Microchip Technology Inc.
FIGURE 4-2: Step-Down Converter.
4.2.2 PEAK CURRENT MODE CONTROL
The MCP16331 integrates a Peak Current Mode
Control architecture, resulting in superior AC regulation
while minimizing the number of voltage loop
compensation components and their size for
integration. Peak Current Mode Control takes a small
portion of the inductor current, replicates it and
compares this replicated current sense signal with the
output of the integrated error voltage. In practice, the
inductor current and the internal switch current are
equal during the switch-on time. By adding this peak
current sense to the system control, the step-down
power train system is reduced from a 2
nd
order to a 1
st
order. This reduces the system complexity and
increases its dynamic performance.
For Pulse-Width Modulation (PWM) duty cycles that
exceed 50%, the control system can become bimodal
where a wide pulse followed by a short pulse repeats
instead of the desired fixed-pulse width. To prevent this
mode of operation, an internal compensating ramp is
summed into the current shown in
Figure 4-2.
4.2.3 PULSE-WIDTH MODULATION
(PWM)
The internal oscillator periodically starts the switching
period, which in MCP16331’s case occurs every 2
µs
or 500
kHz. With the integrated switch turned on, the
inductor current ramps up until the sum of the current
sense and slope compensation ramp exceeds the
integrated error amplifier output. The error amplifier
output slews up or down to increase or decrease the
inductor peak current feeding into the output LC filter. If
the regulated output voltage is lower than its target, the
error amplifier output rises. This results in an increase
in the inductor current to correct for error in the output
voltage. The fixed frequency duty cycle is terminated
when the sensed inductor peak current summed with
the internal slope compensation exceeds the output
voltage of the error amplifier. The PWM latch is set by
turning off the internal switch and preventing it from
turning on until the beginning of the next cycle. An
overtemperature signal or boost cap undervoltage can
also reset the PWM latch to terminate the cycle.
When working close to the boundary conduction
threshold, a jitter on the SW node may occur, reflecting
in the output voltage. Although the low-frequency out
-
put component is very small, it may be desirable to
completely eliminate this component. To achieve this,
different methods can be applied to reduce or com
-
pletely eliminate this component. In addition to a very
good layout, a capacitor in parallel with the top feed
-
back resistor or an RC snubber between the SW node
and GND can be added.
Typical values for the snubber are 680 pF and 430,
while the capacitor in parallel with the top feedback
resistor can use values from 10
pF to 47 pF. Using
such a snubber eliminates the ringing on the SW node,
but decreases the overall efficiency of the converter.
Schottky
Diode
C
OUT
V
OUT
SW
V
IN
+
-
SW
on
off
on
on
off
I
L
I
L
L
I
OUT
V
OUT
V
IN
0
SW
on
off
on
on
off
I
L
I
OUT
V
IN
0
Continuous Inductor Current Mode
Discontinuous Inductor Current Mode