Datasheet
2009-2016 Microchip Technology Inc. DS00002306A-page 45
LAN9514/LAN9514I
4.6 Clock Circuit
LAN9514/LAN9514i can accept either a 25MHz crystal (preferred) or a 25MHz single-ended clock oscillator (+/- 50ppm)
input. If the single-ended clock oscillator method is implemented, XO should be left unconnected and XI should be
driven with a nominal 0-3.3V clock signal. The input clock duty cycle is 40% minimum, 50% typical and 60% maximum.
It is recommended that a crystal utilizing matching parallel load capacitors be used for the crystal input/output signals
(XI/XO). See Table 4-10 for the recommended crystal specifications.
TABLE 4-9: JTAG TIMING VALUES
Symbol Description Min Max Units Notes
t
tckp
TCK clock period 66.67 — ns —
t
tckhl
TCK clock high/low time t
tckp
*0.4 t
tckp
*0.6 ns —
t
su
TDI, TMS setup to TCK rising edge 10 — ns —
t
h
TDI, TMS hold from TCK rising edge 10 — ns —
t
dov
TDO output valid from TCK falling edge — 16 ns —
t
doh
TDO output hold from TCK falling edge 0 — ns —
TABLE 4-10: LAN9514/LAN9514I CRYSTAL SPECIFICATIONS
Parameter Symbol Min Nom Max Units Notes
Crystal Cut AT, typ —
Crystal Oscillation Mode Fundamental Mode —
Crystal Calibration Mode Parallel Resonant Mode —
Frequency F
fund
— 25.000 — MHz —
Frequency Tolerance @ 25°C F
tol
— — +/-50 PPM Note 4-13
Frequency Stability Over Temp F
temp
— — +/-50 PPM Note 4-13
Frequency Deviation Over Time F
age
— +/-3 to 5 — PPM Note 4-14
Total Allowable PPM Budget — — +/-50 PPM Note 4-15
Shunt Capacitance C
O
—7 typ—pF—
Load Capacitance C
L
— 20 typ — pF —
Drive Level P
W
300 — — uW —
Equivalent Series Resistance R
1
——50Ω —
Operating Temperature Range Note 4-16 — Note 4-17 °C —
LAN9514/LAN9514i XI Pin
Capacitance
—3 typ—pFNote 4-18
LAN9514/LAN9514i XO Pin
Capacitance
—3 typ—pFNote 4-18