Datasheet

LAN9514/LAN9514I
DS00002306A-page 12  2009-2016 Microchip Technology Inc.
Note 2-1 Exposed pad on package bottom (Figure 2-1).
TABLE 2-6: I/O POWER PINS, CORE POWER PINS, AND GROUND PAD
Num
PINs
Name Symbol
Buffer
Type
Description
5 +3.3V I/O Power VDD33IO P +3.3V Power Supply for I/O Pins.
Refer to the LAN9514/LAN9514i reference
schematics for connection information.
2 Digital Core
+1.8V Power
Supply Output
VDD18CORE P +1.8V power from the internal core voltage
regulator. All VDD18CORE pins must be tied
together for proper operation.
Refer to the LAN9514/LAN9514i reference
schematics for connection information.
1
Note
2-1
Ground VSS P Ground
TABLE 2-7: 64-QFN PACKAGE PIN ASSIGNMENTS
Pin
Num
Pin Name
Pin
Num
Pin Name
Pin
Num
Pin Name
Pin
Num
Pin Name
1 USBDM2 17 PRTCTL4 33 VDD33IO 49 VDD33A
2 USBDP2 18 PRTCTL5 34 TEST2 50 EXRES
3 USBDM3 19 VDD33IO 35 GPIO3 51 VDD33A
4 USBDP3 20 nFDX_LED/
GPIO0
36 GPIO4 52 RXP
5 VDD33A 21 nLNKA_LED/
GPIO1
37 GPIO5 53 RXN
6 USBDM4 22 nSPD_LED/
GPIO2
38 VDD18CORE 54 VDD33A
7 USBDP4 23 EECLK 39 VDD33IO 55 TXP
8 USBDM5 24 EECS 40 TEST3 56 TXN
9 USBDP5 25 EEDO 41 AUTOMDIX_EN 57 VDD33A
10 VDD33A 26 EEDI 42 GPIO6 58 USBDM0
11 VBUS_DET 27 VDD33IO 43 GPIO7 59 USBDP0
12 nRESET 28 nTRST 44 CLK24_EN 60 XO
13 TEST1 29 TMS 45 CLK24_OUT 61 XI
14 PRTCTL2 30 TDI 46 VDD33IO 62 VDD18USBPLL