Datasheet

 2013-2015 Microchip Technology Inc. DS00001987A-page 99
LAN8740A/LAN8740Ai
4.3.14 MISCELLANEOUS CONFIGURATION REGISTER (MCFGR)
Index (In Decimal): 3.32868 Size: 16 bits
Bits Description Type Default
15:0 nPME Assert Delay
This register controls the delay of nPME de-assertion time when the nPME
Self Clear bit of the Wakeup Control and Status Register (WUCSR) is set.
Each count is equivalent to a 20 µs delay. The delay max is 1.31 seconds.
Time = (register value + 1) x 20 µs.
R/W/
NASR
1000h