Datasheet

LAN8740A/LAN8740Ai
DS00001987A-page 88  2013-2015 Microchip Technology Inc.
4.3.5 EEE CAPABILITY REGISTER
Note 1: The default value of this field is determined by the value of the PHY Energy Efficient Ethernet Enable (PHY-
EEEEN) of the EDPD NLP/Crossover Time/EEE Configuration Register. If PHY Energy Efficient Ethernet
Enable (PHYEEEEN) is 0b, this field is 0b and 100BASE-TX EEE capability is not supported. If PHY Energy
Efficient Ethernet Enable (PHYEEEEN) is 1b, then this field is 1b and 100BASE-TX EEE capability is sup-
ported.
Index (In Decimal): 3.20 Size: 16 bits
Bits Description Type Default
15:7 RESERVED RO -
6 10GBASE-KR EEE
0 = EEE is not supported for 10GBASE-KR.
1 = EEE is supported for 10GBASE-KR.
Note: The device does not support this mode.
RO 0b
5 10GBASE-KX4 EEE
0 = EEE is not supported for 10GBASE-KX4.
1 = EEE is supported for 10GBASE-KX4.
Note: The device does not support this mode.
RO 0b
4 10GBASE-KX EEE
0 = EEE is not supported for 10GBASE-KX.
1 = EEE is supported for 10GBASE-KX.
Note: The device does not support this mode.
RO 0b
3 10GBASE-T EEE
0 = EEE is not supported for 10GBASE-T.
1 = EEE is supported for 10GBASE-T.
Note: The device does not support this mode.
RO 0b
2 1000BASE-T EEE
0 = EEE is not supported for 1000BASE-T.
1 = EEE is supported for 1000BASE-T.
Note: The device does not support this mode.
RO 0b
1 100BASE-TX EEE
0 = EEE is not supported for 100BASE-TX.
1 = EEE is supported for 100BASE-TX.
RO (see Note 1)
0 RESERVED RO -