Datasheet

2013-2015 Microchip Technology Inc. DS00001987A-page 75
LAN8740A/LAN8740Ai
4.2.16 TDR CONTROL/STATUS REGISTER
Index (In Decimal): 25 Size: 16 bits
Bits Description Type Default
15 TDR Enable
0 = TDR mode disabled
1 = TDR mode enabled
Note: This bit self clears when TDR completes
(TDR Channel Status goes high)
R/W
NASR
SC
0b
14 TDR Analog to Digital Filter Enable
0 = TDR analog to digital filter disabled
1 = TDR analog to digital filter enabled (reduces noise spikes during TDR
pulses)
R/W
NASR
0b
13:11 RESERVED RO -
10:9 TDR Channel Cable Type
Indicates the cable type determined by the TDR test.
00 = Default
01 = Shorted cable condition
10 = Open cable condition
11 = Match cable condition
R/W
NASR
00b
8 TDR Channel Status
When high, this bit indicates that the TDR operation has completed. This bit
will stay high until reset or the TDR operation is restarted (TDR Enable = 1)
R/W
NASR
0b
7:0 TDR Channel Length
This eight bit value indicates the TDR channel length during a short or open
cable condition. Refer to Section 3.8.11.1, "Time Domain Reflectometry (TDR)
Cable Diagnostics" for additional information on the usage of this field.
Note: This field is not valid during a match cable condition. The Cable
Length Register must be used to determine cable length during a
non-open/short (match) condition. Refer to Section 3.8.11, "Cable
Diagnostics" for additional information.
R/W
NASR
00h